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SLAS366 bảng dữ liệu(PDF) 30 Page - Texas Instruments |
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SLAS366 bảng dữ liệu(HTML) 30 Page - Texas Instruments |
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30 / 56 page ![]() 4–2 4.2 Control Register 2 D7 D6 D5 D4 D3 D2 D1 D0 TURBO DIFBP I2C6 I2C5 I2C4 GPO HPC R/W R/W R/W R/W R/W R/W R/W R/W NOTE: R = Read, W = Write Table 4–2. Control Register 2 Bit Summary BIT NAME RESET VALUE FUNCTION D7 TURBO 0 Turbo mode. This bit is used to set the SCLK rate. TURBO = 0 SCLK = (16 × FS × #Device × mode) TURBO = 1 SCLK = MCLK/P (P is determined in register 4) D6 DIFBP 0 Decimation/interpolation filter bypass. This bit is used to bypass both decimation and interpolation filters. DIFBP = 0 Decimation/interpolation filters are operated. DIFBP = 1 Decimation/interpolation filters are bypassed. D5–D3 I2Cx 100 I2C device address. These three bits are programmable to define three MSBs of the I2C device address (reset value is 100). These three bits are combined with the 4-bit SMARTDM device address to form 7-bit I2C device address. D2 GPO 0 General-purpose output D1–D0 HPC 00 Host port control bits. Write the following values into D1–D0 to select the appropriate configuration for two pins SDA and SCL. SDA pin is set to be equal to D2 if D1–D0 = 10. D1–D0 0 0 SDA and SCL pins are used for I2C interface 0 1 SDA and SCL pins are used for S2C interface 1 0 SDA pin = D2, input going into SCL pin is output to DOUT 1 1 SDA pin = Control frame flag. 4.3 Control Register 3 D7 D6 D5 D4 D3 D2 D1 D0 PWDN SWRS OSR-option ASRF R/W R/W R/W R/W R/W NOTE: R = Read, W = Write Table 4–3. Control Register 3 Bit Summary BIT NAME RESET VALUE FUNCTION D7–D6 PWDN 00 Power down PWDN = 00 No power down PWDN = 01 Power-down A/D PWDN = 10 Power-down D/A PWDN = 11 Software power down the entire device D5 SWRS 0 Software reset. Set this bit to 1 to reset the device. D4-D3 OSR op- tion 00 OSR option. D4–D3=X1 OSR for DAC Channel is 512( Max Fs=8Ksps) D4–D3=10 OSR for DAC Channel is 256( Max Fs=16Ksps) D4–D3=00 OSR for DAC Channel is 128(Max Fs=26Ksps) D2-D0 ASRF 001 Asynchronous sampling rate factor. These three bits define the ratio n between FS frequency and the desired sampling frequency fs (Applied only if different sampling rate between CODEC1 and CODEC2 is desired) ASRF = 001 n = FS/fs = 1 ASRF = 010 n = FS/fs = 2 ASRF = 011 n = FS/fs = 3 ASRF = 100 n = FS/fs = 4 ASRF = 101 n = FS/fs = 5 ASRF = 110 n = FS/fs = 6 ASRF = 111 n = FS/fs = 7 ASRF = 000 n = FS/fs = 8 |
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