TLC2933A

HIGH PERFORMANCE PHASE LOCKED LOOP

SLES149 − OCTOBER 2005

8

TI.COM

operation characteristics, VDD = 3.3 V, TA = 25°C (unless otherwise noted) (continued)

PFD section

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

fmax

Maximum operation frequency

40

MHz

tPLZ

PFD output disable time from low level

21

50

ns

tPHZ

PFD output disable time from high level

21

50

ns

tPZL

PFD output enable time to low level

5.8

30

ns

tPZH

PFD output enable time to high level

6.2

30

ns

tr

Rise time

CL = 15 pF

3

10

ns

tf

Fall time

CL = 15 pF

1.7

10

ns

electrical characteristics, VDD = 5 V, TA = 25°C (unless otherwise noted)

VCO section

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VOH

High level output voltage

IOH = –2 mA

4

V

VOL

Low level output voltage

IOL = 2 mA

0.5

V

VTH

Input threshold voltage at select, VCO

inhibit

1.5

2.5

3.5

V

II

Input current at select, VCO inhibit

VI = VDD or GND

±1

µA

ZI(VCOIN)

VCO IN input impedance

VCO IN = 1/2 VDD

10

M(

IDD(inh)

VCO supply current (inhibit)

See Note 16

0.61

1

µA

IDD(vco)

VCO supply current

See Note 17

35.5

55

mA

NOTES: 16. Current into VCO VDD, when VCO INHIBIT = high, PFD is inhibited.

17. Current into VCO VDD, when VCO IN = 1/2 VDD, RBIAS = 3.3 kΩ, VCOOUT = 15-pF Load, VCO INHIBIT = GND, and

PFD INHIBIT = GND.

PFD section

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VOH

High level output voltage

IOH = –2 mA

4.5

V

VOL

Low level output voltage

IOL = 2 mA

0.2

V

IOZ

High impedance state output current

PFD inhibit = high, Vo = VDD or

GND

±1

µA

VIH

High level input voltage at Fin−A, Fin−B

4.5

V

VIL

Low level input voltage at Fin−A, Fin−B

1

V

VTH

Input threshold voltage at PFD inhibit

1.5

2.5

3.5

CIN

Input capacitance at Fin−A, Fin−B

5.6

pF

ZIN

Input impedance at Fin−A, Fin−B

10

M

Ω

IDD(Z)

High impedance state PFD supply current

See Note 18

1

µA

IDD(PFD)

PFD supply current

See Note 19

0.48

3

mA

NOTES: 18. The current into LOGIC VDD when FIN−A and FIN−B = ground, PFD INHIBIT = VDD, PFD OUT open, and VCO OUT is inhibited.

19. The current into LOGIC VDD when FIN−A = 1 MHz and FIN−B = 1 MHz (VI(PP) = 5 V, rectangular wave), PFD INHIBIT = GND, PFD

OUT open, and VCO OUT is inhibited