PIC12LF1501 datasheet(69/352 Pages) MICROCHIP

69 / 352 page

 2011-2015 Microchip Technology Inc.

DS40001607D-page 69

PIC16(L)F1503

PIR2: PERIPHERAL INTERRUPT REQUEST REGISTER 2

U-0

R/W-0/0

U-0

R/W-0/0

U-0

—

C2IF

C1IF

—

BCL1IF

NCO1IF

—

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

u = Bit is unchanged

x = Bit is unknown

-n/n = Value at POR and BOR/Value at all other Resets

‘1’ = Bit is set

‘0’ = Bit is cleared

bit 7

Unimplemented:

Read as ‘0’

bit 6

C2IF:

Comparator C2 Interrupt Flag bit

= Interrupt is pending

= Interrupt is not pending

bit 5

C1IF:

Comparator C1 Interrupt Flag bit

= Interrupt is pending

= Interrupt is not pending

bit 4

Unimplemented:

Read as ‘0’

bit 3

BCL1IF:

MSSP Bus Collision Interrupt Flag bit

= Interrupt is pending

= Interrupt is not pending

bit 2

NCO1IF:

Numerically Controlled Oscillator Flag bit

= Interrupt is pending

= Interrupt is not pending

bit 1-0

Unimplemented:

Read as ‘0’

Note:

Interrupt flag bits are set when an interrupt

condition occurs, regardless of the state of

its corresponding enable bit or the Global

Interrupt Enable bit, GIE of the INTCON

appropriate interrupt flag bits are clear prior

to enabling an interrupt.

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