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THS6012CDWP bảng dữ liệu(PDF) 24 Page - Texas Instruments |
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THS6012CDWP bảng dữ liệu(HTML) 24 Page - Texas Instruments |
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24 / 37 page ![]() P D + T MAX –T A q JA Where: PD = Maximum power dissipation of THS6012 (watts) TMAX = Absolute maximum junction temperature (150°C) TA = Free-ambient air temperature ( °C) θJA = θJC + θCA θJC = Thermal coefficient from junction to case (0.37°C/W) θCA = Thermal coefficient from case to ambient 0.1025 0.080 0.178 0.026 0.024 0.021 0.0165 0.450 0.476 .039 0.026 0.120 0.085 PowerPAD and via placement pad area (0.085 x 0.120) with 15 vias (Via diameter = 0.013) Vias should go through the board connecting the top layer PowerPad to any and all ground planes. (The larger the ground plane, the larger the area to distribute the heat.) Solder resist should be used on the bottom side ground plane in order to prevent wicking of the solder through the vias during the reflow process. All Units in Inches THS6012 SLOS226F – SEPTEMBER 1998 – REVISED JUNE 2012 www.ti.com reflow operation as any standard surface-mount component. This results in a part that is properly installed. Figure 45. PowerPAD PCB Etch and Via Pattern The actual thermal performance achieved with the THS6012 in its PowerPAD package depends on the application. In the previous example, if the size of the internal ground plane is approximately 3 inches × 3 inches, then the expected thermal coefficient, ΘJA, is about 21.5°C/W. For a givenΘ JA, the maximum power dissipation is shown in Figure 46 and is calculated by the following formula: More complete details of the PowerPAD installation process and thermal management techniques can be found in the Texas Instruments Technical Brief, PowerPAD Thermally Enhanced Package. This document can be found at the TI web site (www.ti.com) by searching on the key word PowerPAD. The document can also be ordered through your local TI sales office. Refer to literature number SLMA002 when ordering. 24 Copyright © 1998–2012, Texas Instruments Incorporated |
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