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STM32F207VCT6 bảng dữ liệu(PDF) 74 Page - STMicroelectronics |
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STM32F207VCT6 bảng dữ liệu(HTML) 74 Page - STMicroelectronics |
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74 / 184 page ![]() Electrical characteristics STM32F20xxx 74/184 DocID15818 Rev 15 Table 15. Limitations depending on the operating power supply range Operating power supply range ADC operation Maximum Flash memory access frequency (fFlashmax) Number of wait states at maximum CPU frequency (fCPUmax= 120 MHz)(1) I/O operation FSMC_CLK frequency for synchronous accesses Possible Flash memory operations VDD =1.8 to 2.1 V(2) Conversion time up to 1 Msps 16 MHz with no Flash memory wait state 7(3) – Degraded speed performance – No I/O compensation Up to 30 MHz 8-bit erase and program operations only VDD = 2.1 to 2.4 V Conversion time up to 1 Msps 18 MHz with no Flash memory wait state 6(3) – Degraded speed performance – No I/O compensation Up to 30 MHz 16-bit erase and program operations VDD = 2.4 to 2.7 V Conversion time up to 2 Msps 24 MHz with no Flash memory wait state 4(3) – Degraded speed performance –I/O compensation works Up to 48 MHz 16-bit erase and program operations VDD = 2.7 to 3.6 V(4) Conversion time up to 2 Msps 30 MHz with no Flash memory wait state 3(3) – Full-speed operation –I/O compensation works –Up to 60 MHz when VDD = 3.0 to 3.6 V –Up to 48 MHz when VDD = 2.7 to 3.0 V 32-bit erase and program operations 1. The number of wait states can be reduced by reducing the CPU frequency (see Figure 21). 2. On devices in WLCSP64+2 package, if IRROFF is set to VDD, the supply voltage can drop to 1.7 V when the device operates in the 0 to 70 °C temperature range using an external power supply supervisor (see Section 3.16). 3. Thanks to the ART accelerator and the 128-bit Flash memory, the number of wait states given here does not impact the execution speed from Flash memory since the ART accelerator allows to achieve a performance equivalent to 0 wait state program execution. 4. The voltage range for OTG USB FS can drop down to 2.7 V. However it is degraded between 2.7 and 3 V. |
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