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ISL85403EVAL2Z bảng dữ liệu(PDF) 20 Page - Renesas Technology Corp |
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ISL85403EVAL2Z bảng dữ liệu(HTML) 20 Page - Renesas Technology Corp |
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20 / 25 page ![]() ISL85403 FN8631 Rev.4.00 Page 20 of 24 Sep 28, 2020 Loop Compensation Design - Buck The ISL85403 uses constant frequency peak current mode control architecture to achieve fast loop transient response. An accurate current sensing pilot device in parallel with the upper MOSFET is used for peak current control signal and overcurrent protection. The inductor is not considered a state variable because its peak current is constant and the system becomes a single order system. It is much easier to design the compensator to stabilize the loop compared with voltage mode control. Peak current mode control has an inherent input voltage feed-forward function to achieve good line regulation. Figure 32 shows the small signal model of a buck regulator. PWM Comparator Gain Fm The PWM comparator gain, Fm, for peak current mode control is given by Equation 20: where Se is the slew rate of the slope compensation and Sn is given by Equation 21: where Rt is the gain of the current amplifier. Current Sampling Transfer Function He(S) In a current loop, the current signal is sampled every switching cycle. It has the following transfer function in Equation 22: where Qn and n are given by Power Stage Transfer Functions Transfer function F1(S) from control to output voltage is: where:, Transfer function F2(S) from control to inductor current is given by Equation 24: where . Current loop gain Ti(S) is expressed as Equation 25: The voltage loop gain with open current loop is expressed in Equation 26: The Voltage loop gain with current loop closed is given by Equation 27: If Ti(S)>>1, then Equation 27 can be simplified as Equation 28: Equation 28 shows that the system is a single order system. Therefore, a simple type II compensator can be easily used to stabilize the system. A type III compensator is needed to expand the bandwidth for current mode control in some cases. A compensator with two zeros and one pole is recommended for this part, as shown in Figure 33. d Vin d IL in in i L + 1:D L i Co Rc -Av(S) d comp v RT Fm He(S) + Ti(S) (S) o v Tv(S) I LP + 1:D Rc Ro -Av(S) RT Fm He(S) o T(S) ^ ^ V ^ ^ ^ ^ ^ ^ FIGURE 32. SMALL SIGNAL MODEL OF BUCK REGULATOR RLP Fm dˆ vˆcomp ----------------- 1 Se Sn + T s -------------------------------- == (EQ. 20) Sn Rt Vin Vo – LP --------------------- = (EQ. 21) He S S 2 n 2 ------- = S nQn --------------- 1 ++ (EQ. 22) Qn 2 --- – = n f SW = FIGURE 33. TYPE III COMPENSATOR F1 S vˆo dˆ ------ Vin 1 S esr ------------ + S 2 o 2 ------- S oQp --------------- 1 ++ --------------------------------------- == (EQ. 23) esr 1 RcCo --------------- Qp Ro Co LP ------- o 1 LPCo ------------------- = , , = F2 S Iˆo dˆ ---- Vin Ro RLP + ------------------------- 1 S z ------ + S 2 o 2 ------- S oQp --------------- 1 ++ --------------------------------------- == (EQ. 24) z 1 RoCo --------------- = Ti S RtFmF2 S H e S = (EQ. 25) Tv S KFmF1 S A v S = (EQ. 26) Lv S Tv S 1Ti S + ------------------------ = (EQ. 27) Lv S Ro RLP + Rt ------------------------- 1 S esr ------------ + 1 S p ------- + ---------------------- Av S He S ---------------- p 1 RoCo --------------- , = (EQ. 28) R2 C1 R1 RBIAS R3 C3 VO VCOMP VREF |
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