ADM560/ADM561

Rev. B | Page 5 of 12

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

28

27

26

SHDN

25

EN

24

23

22

21

20

19

18

V–

17

C2–

16

C2+

15

ADM560

TOP VIEW

(Not to Scale)

28

27

26

SHDN

25

EN

24

23

22

21

20

19

18

V–

17

C2–

16

C2+

15

ADM561

TOP VIEW

(Not to Scale)

Figure 2.ADM560 Pin Configuration

Figure 3. ADM561 Pin Configuration

Table 3. Pin Function Descriptions

Pin No.

Mnemonic

Description

2, 3, 1, 28

Transmitter (Driver) Outputs. Typically ±6 V.

9, 4, 27, 23, 18

Receiver Inputs. These inputs accept RS-232 signal levels. An internal 5 kΩ pull-down resistor to GND is

connected on each of these inputs.

8, 5, 26, 22, 19

Receiver Outputs. These are 3 V logic levels.

7, 6, 20, 21

Transmitter (Driver) Inputs. These inputs accept 3 V or 5 V logic levels. An internal 400 kΩ pull-up resistor

10

GND

Ground Pin. Must be connected to 0 V.

11

Power Supply Input 3.3 V ± 10%.

12, 14

C1+, C1−

External Capacitor 1 is connected between these pins.

13

V+

Internally Generated Positive Supply. +6.6 V nominal.

15, 16

C2+, C2−

External Capacitor 2 is connected between these pins.

17

V−

Internally Generated Negative Supply. −6.6 V nominal.

24

EN/EN

Receiver Enable. EN, active high on ADM560. EN, active low on ADM561. Refer to Table 4.

25

SHDN/SHDN

Shutdown Control. SHDN, active low on ADM560. SHDN, active high on ADM561. Refer to Table 4.

Table 4. ADM560/ADM561 Enable and Shutdown Control

ADM560

ADM561

SHDN = 1

SHDN = 0

EN = 1; receivers active

EN = 0; receivers active

Normal Operation

EN = 0; receivers inactive

EN = 1; receivers inactive

SHDN = 0

SHDN = 1

EN = 1; Receiver R1 to Receiver R3 inactive

EN = 0; receivers inactive

EN = 1; Receiver R4 and Receiver R5 active

EN = 1; receivers inactive

Shutdown Mode

EN = 0; Receiver R1 to Receiver R5 inactive