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STDRIVE102HTR bảng dữ liệu(PDF) 55 Page - STMicroelectronics

tên linh kiện STDRIVE102HTR
Giải thích chi tiết về linh kiện  Triple half-bridge gate driver with programmable currents
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
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STDRIVE102HTR bảng dữ liệu(HTML) 55 Page - STMicroelectronics

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List of figures
Figure 1.
STDRIVE102BH block diagram ........................................................ 3
Figure 2.
STDRIVE102H block diagram.......................................................... 3
Figure 3.
STDRIVE102BH pin description ....................................................... 11
Figure 4.
STDRIVE102H pin description ........................................................ 13
Figure 5.
Power management block diagram ..................................................... 15
Figure 6.
12 V LDO output according to the current load at different VS input ............................... 16
Figure 7.
VCC thresholds (power-good and UVLO) ................................................. 17
Figure 8.
3.3 V LDO output according to the current load at different REGIN_3V3 input ........................ 17
Figure 9.
Charge pump simplified block diagram................................................... 18
Figure 10.
Charge pump output voltage with respect to the load current ................................... 19
Figure 11.
High-side driver simplified block diagram ................................................. 20
Figure 12.
Low-side driver simplified block diagram ................................................. 20
Figure 13.
TCC and IGATE level selection example ................................................. 22
Figure 14.
Current management using EN/IN mode ................................................. 24
Figure 15.
Current management using direct mode INH/INL ........................................... 26
Figure 16.
Example of TCC and IGATE pin configuration.............................................. 27
Figure 17.
Propagation delay in enable/input mode, ENx pin high........................................ 27
Figure 18.
Propagation delay in enable/input mode, ENx pin switching .................................... 28
Figure 19.
Propagation delay in direct mode (INHx/INLx).............................................. 28
Figure 20.
VDS monitoring basic diagram......................................................... 29
Figure 21.
VDS monitoring example ............................................................ 30
Figure 22.
STDRIVE102BH AFE block diagram .................................................... 30
Figure 23.
STDRIVE102H AFE block diagram ..................................................... 31
Figure 24.
AFE comparator example............................................................ 31
Figure 25.
STDRIVE102BH/H thermal thresholds ................................................... 34
Figure 26.
Automatic re-arm using EN and nFAULT pins .............................................. 36
Figure 27.
FLAG and EN management .......................................................... 37
Figure 28.
STDRIVE102BH typical application example .............................................. 40
Figure 29.
STDRIVE102H typical application example ............................................... 41
Figure 30.
VFQFPN 48L 6x6x1 mm, pitch 0.4 mm package outline ....................................... 44
Figure 31.
VFQFPN 48L 6x6x1 mm, pitch 0.4 mm suggested footprint .................................... 46
Figure 32.
VFQFPN 40L 5x5x1 mm, pitch 0.4 package outline .......................................... 47
Figure 33.
VFQFPN 40L 5x5x1 mm, pitch 0.4 mm suggested footprint .................................... 49
STDRIVE102BH, STDRIVE102H
List of figures
DS14545 - Rev 1
page 55/56



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