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LP3991

SNVS296J – DECEMBER 2006 – REVISED JUNE 2016

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Unfortunately, this RθJA is highly dependent on the heat-spreading capability of the particular PCB design, and

therefore varies according to the total copper area, copper weight, and location of the planes. The RθJA recorded

in Thermal Information is determined by the specific EIA/JEDEC JESD51-7 standard for PCB and copper-

spreading area, and is to be used only as a relative measure of package thermal performance. For a well-

designed thermal layout, RθJA is actually the sum of the package junction-to-board thermal resistance (RθJB) plus

the thermal resistance contribution by the PCB copper area acting as a heat sink.

8.2.2.7 Estimating Junction Temperature

The EIA/JEDEC standard recommends the use of psi (

Ψ) thermal characteristics to estimate the junction

temperatures of surface mount devices on a typical PCB board application. These characteristics are not true

thermal resistance values, but rather package specific thermal characteristics that offer practical and relative

means of estimating junction temperatures. These psi metrics are determined to be significantly independent of

copper-spreading area. The key thermal characteristics (

ΨJT and ΨJB) are given in Thermal Information and are

used in accordance with Equation 4 or Equation 5.

TJ(MAX) = TTOP + (ΨJT × PD(MAX))

where

•

PD(MAX) is explained in Equation 1

•

TTOP is the temperature measured at the center-top of the device package.

(4)

TJ(MAX) = TBOARD + (ΨJB × PD(MAX))

where

•

PD(MAX) is explained in Equation 1

•

TBOARD is the PCB surface temperature measured 1 mm from the device package and centered on the

package edge.

(5)

For more information about the thermal characteristics

ΨJT and ΨJB, see Semiconductor and IC Package

Thermal Metrics (SPRA953); for more information about measuring TTOP and TBOARD, see Using New Thermal

Metrics (SBVA025); and for more information about the EIA/JEDEC JESD51 PCB used for validating RθJA, see

the Thermal Characteristics of Linear and Logic Packages Using JEDEC PCB Designs (SZZA017). These

application notes are available at www.ti.com.