+

-

Guard

OUT

+1

IN

VREF

+

-

Guard

Input

Rleak

Cstray

Ground

2.5V

ûV = 2.5V!

2.5V

ûV = 0V!

Cstray

Rleak

0V

High Impedance

Input Amplifer

Guard

Driver

Vcm

Leakage

Path

Leakage

Path

LMP7721

SNOSAW6E – JANUARY 2008 – REVISED DECEMBER 2014

www.ti.com

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

8.1 Application Information

The LMP7721 is specified for operation from 1.8 V to 5.5 V. Many of the specifications apply from –40°C to

125°C. Parameters that can exhibit significant variance with regard to operating voltage or temperature are

presented in the Typical Characteristics section.

8.1.1 Using a Guard

In order to take full advantage of the LMP7721’s ultra-low input bias current, a "Guard" trace is recommended

when designing sub-nanoamp systems.

Figure 46. Guarding Theory

A "Guard" is a driven trace or shield that physically surrounds the input trace and feedback circuitry that is held at

a potential equal to the average input signal potential. Since the input circuitry and the guard are kept at the

same potential, the leakage current between the two nodes is practically zero. The guard is a low-impedance

node, so any external leakages will "leak" into the guard and not into the protected input. One benefit of using a

guard is it cancels the effect of the added stray and cable capacitance at low frequencies (but cannot cancel the

sensor or amplifier input capacitance).

The guard potential may be taken from the inverting input (summing node) in noninverting and buffer

applications. An example of this is shown in Figure 47 If the guarding needs to extend beyond the immediate

local area around the IC, then a buffer should be used to drive the guard to prevent adding additional

capacitance to the inverting node.

Figure 47. Guarding the Noninverting Configuration

The guard potential may be taken from the noninverting input or reference voltage in inverting or transimpedance

applications. An example of this is shown in Figure 48

20

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