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LM90 bảng dữ liệu(PDF) 6 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  LM90 ±3°C Accurate, Remote Diode and Local Digital Temperature Sensor with Two-Wire Interface
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LM90 bảng dữ liệu(HTML) 6 Page - Texas Instruments

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LM90
SNIS126A – MAY 2004 – REVISED MARCH 2013
www.ti.com
SMBus DIGITAL SWITCHING CHARACTERISTICS
Unless otherwise noted, these specifications apply for VDD= +3.0 Vdc to +3.6 Vdc, CL (load capacitance) on output lines =
80 pF. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = +25°C, unless otherwise noted.
The switching characteristics of the LM90 fully meet or exceed the published specifications of the SMBus version 2.0. The
following parameters are the timing relationships between SMBCLK and SMBData signals related to the LM90. They adhere
to but are not necessarily the SMBus bus specifications.
Typical(1)
Limits(2)
Units
Symbol
Parameter
Conditions
(Limit)
fSMB
SMBus Clock Frequency
100
kHz (max)
10
kHz (min)
tLOW
SMBus Clock Low Time
from VIN(0)max to VIN(0)max
4.7
µs (min)
25
ms (max)
tHIGH
SMBus Clock High Time
from VIN(1)min to VIN(1)min
4.0
µs (min)
tR,SMB
SMBus Rise Time
See (3)
1
µs (max)
tF,SMB
SMBus Fall Time
See (4)
0.3
µs (max)
tOF
Output Fall Time
CL = 400pF,
250
ns (max)
IO = 3mA
(4)
tTIMEOUT
SMBData and SMBCLK Time Low for Reset of
25
ms (min)
Serial Interface (5)
35
ms (max)
tSU;DAT
Data In Setup Time to SMBCLK High
250
ns (min)
tHD;DAT
Data Out Stable after SMBCLK Low
300
ns (min)
900
ns (max)
tHD;STA
Start Condition SMBData Low to SMBCLK Low
100
ns (min)
(Start condition hold before the first clock falling
edge)
tSU;STO
Stop Condition SMBCLK High to SMBData Low
100
ns (min)
(Stop Condition Setup)
tSU;STA
SMBus Repeated Start-Condition Setup Time,
0.6
µs (min)
SMBCLK High to SMBData Low
tBUF
SMBus Free Time Between Stop and Start
1.3
µs (min)
Conditions
(1)
Typicals are at TA = 25°C and represent most likely parametric norm.
(2)
Limits are ensured to AOQL (Average Outgoing Quality Level).
(3)
The output rise time is measured from (VIN(0)max + 0.15V) to (VIN(1)min − 0.15V).
(4)
The output fall time is measured from (VIN(1)min - 0.15V) to (VIN(1)min + 0.15V).
(5)
Holding the SMBData and/or SMBCLK lines Low for a time interval greater than tTIMEOUT will reset the LM90's SMBus state machine,
therefore setting SMBData and SMBCLK pins to a high impedance state.
SMBus Communication
6
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Copyright © 2004–2013, Texas Instruments Incorporated
Product Folder Links: LM90



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