74HC_HCT240

All information provided in this document is subject to legal disclaimers.

© NXP Semiconductors N.V. 2016. All rights reserved.

Product data sheet

Rev. 4 — 25 February 2016

7 of 17

NXP Semiconductors

74HC240; 74HCT240

Octal buffer/line driver; 3-state; inverting

[1]

tpd is the same as tPHL and tPLH.

[2]

ten is the same as tPZH and tPZL.

[3]

tdis is the same as tPHZ and tPLZ.

[4]

tt is the same as tTHL and tTLH.

[5]

CPD is used to determine the dynamic power dissipation (PD in W):

PD =CPD  VCC2  fi  N+  (CL  VCC2  fo) where:

fi = input frequency in MHz;

fo = output frequency in MHz;

CL = output load capacitance in pF;

VCC = supply voltage in V;

N = number of inputs switching;

 (C

L  VCC

2

 f

o) = sum of outputs.

11. Waveforms

CPD

power dissipation

capacitance

per transceiver;

VI =GND to VCC

[5]

-30-

-

-

pF

74HCT240

tpd

propagation delay

nAn to nYn; see Figure 6

[1]

VCC = 4.5 V

-

11

20

25

30

ns

VCC = 5.0 V; CL =15pF

-

9

-

-

-

ns

ten

enable time

nOE to nYn; VCC =4.5 V;

see Figure 7

[2]

-13

3038

45

ns

tdis

disable time

nOE to nYn; VCC =4.5 V;

see Figure 7

[3]

-13

2531

38

ns

tt

transition time

VCC = 4.5 V; see Figure 6

[4]

-

5

12

15

18

ns

CPD

power dissipation

capacitance

per transceiver;

VI =GND to VCC  1.5 V

[5]

-30-

-

-

pF

Table 7.

Dynamic characteristics …continued

GND = 0 V; for test circuit see Figure 8.

Symbol Parameter

Conditions

25

C

40 C to +125 C Unit

Min

Typ

Max

Max

(85

C)

Max

(125

C)

Measurement points are given in Table 8.

VOL and VOH are typical voltage output drop that occur with the output load.

Fig 6.

Input (nAn) to output (nYn) propagation delays and output transition times