SCL

data

change

allowed

data

valid

data

change

allowed

data

valid

data

change

allowed

SDA

TX PA

PP/PC

Imager

LM3553

FEN

Tx

SCL

SDA

LM3553

www.ti.com

SNVS414B – FEBRUARY 2008 – REVISED MAY 2013

TX Pin

The transmission pin (TX) can be used to limit the current drawn from the battery during a PA transmission.

When the TX pin is driven high (logic '1') during a flash pulse, the LM3553 will switch to the programmed torch

current level. Once the TX pin is driven low (logic '0'), the LM3553 will return to the flash current if this event

occurs within the original flash duration.

It is recommended that an external pull-down be placed between the TX pin and GND to prevent unwanted LED

flashing during system start-up due to unknown control logic states.

M/F Pin

The multi-function pin (M/F) can be configured to provide hardware RESET or a general purpose input/output

(GPIO). All functionality is programmed through the I2C compatible interface and set in the M/F pin functionality

control register (address 0x20). The default function is a RESET, where a logic '1' places the part in the normal

operating mode, and a logic '0' places the part into a RESET state. A reset condition will place all LM3553

registers into their default states.

Connection Diagram

Figure 15. Typical System Configuration

I2C Compatible Interface

DATA VALIDITY

The data on SDA line must be stable during the HIGH period of the clock signal (SCL). In other words, the state

of the data line can only be changed when CLK is LOW.

Figure 16. Data Validity Diagram

A pull-up resistor between VIO and SDA must be greater than [(VIO-VOL) / 3.7mA] to meet the VOL requirement

on SDA. Using a larger pull-up resistor results in lower switching current with slower edges, while using a smaller

pull-up results in higher switching currents with faster edges.

Copyright © 2008–2013, Texas Instruments Incorporated

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Product Folder Links: LM3553