33800 datasheet(23/39 Pages) FREESCALE

23 / 39 page

Analog Integrated Circuit Device Data

Freescale Semiconductor

33800

FUNCTIONAL DEVICE OPERATION

LOGIC COMMANDS AND REGISTERS

Table 8. And/Or/SPI/Parallel Control

PWM FREQUENCY/DUTY CYCLE COMMAND

The PWM Frequency/Duty Cycle Command allows the

user to individually program a PWM output with a frequency

and duty cycle. Once the PWM Freq/DC registers are

programmed, the PWM output GD1, GD2, GD3 are

controlled via the AND/OR command and GD4, GD5, GD6

are controlled via the PWM pin Enable Command. Pre-driver

output control bits supersede the internal PWM controller.

GDx outputs must be commanded OFF for the controller to

function. (SeeTable 8)

The duty cycle of the PWM outputs is controlled by bits 0

through 6, inclusive. The duty cycle value is 1% per binary

count from 1 to 100 with counts of 101 through 127 defaulting

to 100%. For example:

Sending SPI WORD; 01100x1110001100

This would set PWM1 output to 1.28Khz frequency with a

12% duty cycle.

Table 9 defines the output frequency with the selected

input bits.

VDSNSX SHORT THRESHOLD COMMAND

The short fault threshold voltage of the external MOSFET

may be programmed via SPI. Table 10 illustrates the bit

pattern required for a particular short fault threshold. Open

load fault detect threshold is set internally to 2.5V and may

not be programmed.

VDSNSX SHORT FAULT TIMER COMMAND

The Short Fault Timer can be programmed via the SPI to

the values listed in Table 11, on page 24. When the 33800

detects an over-current condition, as defined by VDS

exceeding the programmed short fault voltage threshold, the

Rload

Measure

PWM Pin

0 = en

1 = dis

AND/OR

Bit

0 = OR

1 = AND

ON/

OFF

Bit

PWM

Freq/

DC EN

Bit

PWM

Output

≠ 0

Rload

Measure

OFF

Freq/DC

OFF

Freq/DC

OFF

Freq/DC

Table 9. Frequency Select

Frequency Select

Bits

987

Frequency Hz

000

10 Hz

001

20 Hz

010

40 Hz

011

80 Hz

100

160 Hz

101

320 Hz

110

640 Hz

111

1.28 kHz

Notes: Tolerance on selected frequency is +-10% with part

calibrated. On state short faults may not be detected if t_on_short >

1/f_pwm * duty_cycle * 0.98.Off state open faults may not be

detected if t_off_open > 1/fpwm * (1-duty_cycle) * 0.75.

Table 10. VDSNSx Fault Threshold Select

PWM VDS FLT

Bits

210

543

876

VDSNSx Fault Threshold Select

000

0.5V

001

1.0V

010

1.5V

011

2.0

100

2.5V

101

3.0V

110

No Change

111

No Change

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