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SLG46533M bảng dữ liệu(PDF) 39 Page - Renesas Technology Corp |
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SLG46533M bảng dữ liệu(HTML) 39 Page - Renesas Technology Corp |
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39 / 189 page ![]() © 2025 Renesas Electronics Corporation Page 38 of 187 SLG46533 Revision 1.30 7.4.15 IO14 Register Settings 7.4.16 IO15 Register Settings Table 33. IO14 Register Settings Signal Function Register Bit Address Register Definition IO14 Driver Strength Selection <1137> 0: 1X 1: 2X IO14 Pull Up/Down Resistor Selection <1138> 0: Pull Down Resistor 1: Pull Up Resistor IO14 Pull Up/Down Resistor Value Selection <1140:1139> 00: Floating 01: 10 k Resistor 10: 100 k Resistor 11: 1 M Resistor IO14 Mode Control <1143:1141> 000: Digital Input without Schmitt Trigger 001: Digital Input with Schmitt Trigger 010: Low Voltage Digital Input 011: Reserved 100: Push Pull 101: Open Drain NMOS 110: Open Drain PMOS 111: Reserved Table 34. IO15 Register Settings Signal Function Register Bit Address Register Definition IO15 Pull Up/Down Resistor Selection <1145> 0: Pull Down Resistor 1: Pull Up Resistor IO15 Pull Up/Down Resistor Value Selection <1147:1146> 00: Floating 01: 10 k Resistor 10: 100 k Resistor 11: 1 M Resistor IO15 Mode Control (sig_io15_oe = 0) <1149:1148> 00: Digital Input without Schmitt Trigger 01: Digital Input with Schmitt Trigger 10: Low Voltage Digital Input 11: Analog Input/Output IO15 Mode Control (sig_io15_oe = 1) <1151:1150> 00: Push Pull 1X 01: Push Pull 2X 10: Open Drain NMOS 1X 11: Open Drain NMOS 2X |
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