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CY74FCT652ATSOC bảng dữ liệu(PDF) 1 Page - Texas Instruments |
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CY74FCT652ATSOC bảng dữ liệu(HTML) 1 Page - Texas Instruments |
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1 / 16 page ![]() CY74FCT652T 8-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS SCCS032B – SEPTEMBER 1994 – REVISED OCTOBER 2001 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Function, Pinout, and Drive Compatible With FCT and F Logic D Reduced VOH (Typically = 3.3 V) Version of Equivalent FCT Functions D Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics D Ioff Supports Partial-Power-Down Mode Operation D Matched Rise and Fall Times D Fully Compatible With TTL Input and Output Logic Levels D 64-mA Output Sink Current 32-mA Output Source Current D Independent Register for A and B Buses D Multiplexed Real-Time and Stored Data Transfer D 3-State Outputs description The CY74FCT652T consists of bus transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal storage registers. GAB and GBA inputs control the transceiver functions. Select-control (SAB and SBA) inputs select either real-time or stored-data transfer. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. A low input level selects real-time data, and a high input level selects stored data. Data on the A or B data bus, or both, can be stored in the internal D-type flip-flops by low-to-high transitions of the appropriate clock (CPAB or CPBA) inputs, regardless of the select or enable levels of the control pins. When SAB and SBA are in the real-time transfer mode, it also is possible to store data without using the internal D-type flip-flops by simultaneously enabling GAB and GBA. In this configuration, each output reinforces its input. Thus, when all other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains at its last state. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. Copyright 2001, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Q OR SO PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 CPAB SAB GAB A1 A2 A3 A4 A5 A6 A7 A8 GND VCC CPBA SBA GBA B1 B2 B3 B4 B5 B6 B7 B8 |
Số phần tương tự - CY74FCT652ATSOC |
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Mô tả tương tự - CY74FCT652ATSOC |
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