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Single-Chip Dual-Channel AC’97 Audio Codec
EMP202
EMPIA Technology
7/15/2002
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8.4. CD Input
Pay attention to differential CD input. Below is an example of differential CD input.
Example of differential CD input
8.5. Odd Addressed Register Access
The EMP202 will return “0000h” when odd-addressed registers and unimplemented registers are
read.
8.6. Power-down Mode
Warm Reset
Cold Reset
Ready =1
Normal
ADCs off PR0
DACs off PR1
Analog off
PR2 or PR3
Digital I/F off
PR4
Shut off
AC-Link
Default
PR0=0 & ADC=1
PR1=0 & DAC=1
PR2=0 & ANL=1
PR0=1
PR1=1
PR2=1
PR4=1
Example of the EMP202 power-down/power-up flow
8.7. Test Mode
8.7.1.ATE In Circuit Test Mode
SDATA_OUT is sampled high at the trailing edge of RESET#. In this mode, the EMP202 will drive
BIT_CLK, SDATA_IN, EAPD, GPIOs, IDs, and SPDIFO to high impedance.
8.7.2.Vendor Specific Test Mode
All other modes are reserved.
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