ACT88430 datasheet(71/74 Pages) QORVO

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Data Sheet Rev. G, August 2021 | Subject to change without notice

71 of 74

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ACT88430

Advanced PMU for Microcontrollers and Solid State Drive Applications

nRESET_AUX1

The nRESET_AUX1 pin is programmed as an open drain output. It goes high 1989us after Buck4 goes into regulation.

nRESET_AUX2

The nRESET pin is not used and should be pulled to GND.

EXT_PG

EXT_PG is configured as an input to turn on LDO1 to start the turn on sequence. When EXT_PG is L, LDO1 is disabled.

When EXT_PG is H, LDO1 is enabled.

MODE

The MODE pin configures Buck1 into either bypass or switcher mode. MODE must be connected to AGND to

configure Buck1 into switcher mode.

GPIO

GPIO is configured as an input to turn on Buck1. When GPIO is H, Buck1 is disabled. When GPIO is H, Buck1 is

enabled.

PWREN

PWREN is not used and must be connected to VCC.

Buck1/2/3/4 Voltage Setting

Buck1/2/3/4 reference voltage is 0.8V. This sets the programmable voltage range between 0.8V to 3.998V in 12.5mV

steps.

LDO1/2/3 Voltage Setting

The LDO1/2/3 reference voltage is 0.8V. This sets the programmable voltage range between 2.0V to 3.575V in 25mV

steps.

Device ID

The CMI 120 Device ID (register 0x7Dh) = 0x20h

I2C Address

The CMI 120 7-bit I2C address is 0x53h. This results in 0xA6h for a write address and 0xA7h for a read address.

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