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AS1156/AS1154

Data Sheet

LVDS Interface

8 Detailed Description

LVDS Interface

The LVDS interface standard is a signaling method intended for point-to-point communication over a controlled-imped-

ance medium as defined by the ANSI/TIA/EIA-644 and IEEE 1596.3 standards. The LVDS standard uses a lower volt-

age swing than other common communication standards, achieving higher data rates with reduced power

consumption while reducing EMI emissions and system susceptibility to noise.

The AS1156/AS1154 is an 800Mbps single/dual differential LVDS driver that is designed for high-speed, point-to-point,

low-power applications. This device accepts LVTTL/LVCMOS input levels and translates them to LVDS output signals.

The AS1156/AS1154 generates a 2.5mA to 4.5mA output current using a current-steering configuration. This current

steering approach induces less ground bounce and no shoot-through current, enhancing noise margin and system

speed performance. The driver outputs are short-circuit current limited, and enter a high-impedance state when the

device is not powered or is disabled.

The current-steering architecture of the AS1156/AS1154 requires a resistive load to terminate the signal and complete

the transmission loop. Because the device switches current and not voltage, the actual output voltage swing is deter-

mined by the value of the termination resistor at the input of an LVDS receiver (AS1157, AS1158). Logic states are

determined by the direction of current flow through the termination resistor.

With a typical 3.7mA output current, the AS1156/AS1154 produces an output voltage of 370mV when driving a 100

Ω

load.

Termination

Because the AS1156/AS1154 is a current-steering device, no output voltage will be generated without a termination

resistor. The termination resistors should match the differential impedance of the transmission line. Output voltage lev-

els depend upon the value of the termination resistor.

The AS1156/AS1154 is optimized for point-to-point interface with 100

Ω termination resistors at the receiver inputs. Ter-

mination resistance values may range between 90 and132

Ω, depending on the characteristic impedance of the trans-

mission medium.