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SML2108F bảng dữ liệu(PDF) 13 Page - Summit Microelectronics, Inc.

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nhà sản xuất  SUMMIT [Summit Microelectronics, Inc.]
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Logo SUMMIT - Summit Microelectronics, Inc.

SML2108F bảng dữ liệu(HTML) 13 Page - Summit Microelectronics, Inc.

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13
2053 2.2 11/07/00
SML2108
SUMMIT MICROELECTRONICS, Inc.
PRELIMINARY
BUS INTERFACE
GENERAL DESCRIPTION
The I2C bus is a two-way, two-line serial communication
between different integrated circuits. The two lines are: a
serial Data line (SDA) and a serial Clock line (SCL). All
Summit Microelectronics parts support a 100kHz clock
rate, and some support the alternative 400kHz clock.
Check the AC Electrical Table for the value of fSCL. The
Figure 8. I2C Data Timing
SDA line must be connected to a positive supply by a pull-
up resistor located on the bus. Summit parts have a
Schmitt input on both lines. See Figure X1 and Table X1
for waveforms and timing on the bus. One bit of Data is
transferred during each Clock pulse. The Data must
remain stable when the Clock is high.
Table 1. I2C Data Timing
2053 Table01 1.0
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SDA Out
tAA
2053 Fig08



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