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TC74HC652AP bảng dữ liệu(PDF) 7 Page - Toshiba Semiconductor

tên linh kiện TC74HC652AP
Giải thích chi tiết về linh kiện  CMOS Digital Integrated Circuit Silicon Monolithic Octal Bus Transceiver/Register (3-state)
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TC74HC652AP
2007-10-01
7
AC Characteristics (input: tr = tf = 6 ns)
Test Condition
Ta
= 25°C
Ta
= −40 to
85°C
Characteristics
Symbol
CL
(pF)
VCC
(V)
Min
Typ.
Max
Min
Max
Unit
Output transition time
tTLH
tTHL
⎯
50
2.0
4.5
6.0
⎯
⎯
⎯
25
7
6
60
12
10
⎯
⎯
⎯
75
15
13
ns
50
2.0
4.5
6.0
⎯
⎯
⎯
74
21
18
150
30
26
⎯
⎯
⎯
190
38
32
Propagation delay
time
(BUS-bus)
tpLH
tpHL
⎯
150
2.0
4.5
6.0
⎯
⎯
⎯
91
26
22
190
38
32
⎯
⎯
⎯
240
48
41
ns
50
2.0
4.5
6.0
⎯
⎯
⎯
98
28
24
210
42
36
⎯
⎯
⎯
265
53
45
Propagation delay
time
(CAB, CBA-bus)
tpLH
tpHL
⎯
150
2.0
4.5
6.0
⎯
⎯
⎯
116
33
28
250
50
43
⎯
⎯
⎯
315
63
54
ns
50
2.0
4.5
6.0
⎯
⎯
⎯
81
23
20
170
34
29
⎯
⎯
⎯
215
43
37
Propagation delay
time
(SAB, SBA-bus)
tpLH
tpHL
⎯
150
2.0
4.5
6.0
⎯
⎯
⎯
98
28
24
210
42
36
⎯
⎯
⎯
265
53
45
ns
50
2.0
4.5
6.0
⎯
⎯
⎯
74
21
18
175
35
30
⎯
⎯
⎯
220
44
37
Propagation enable
time
(GAB, GBA -bus)
tpZL
tpZH
RL = 1 kΩ
150
2.0
4.5
6.0
⎯
⎯
⎯
91
26
22
215
43
37
⎯
⎯
⎯
270
54
46
ns
Output disable time
(GAB, GBA -bus)
tpLZ
tpHZ
RL = 1 kΩ
50
2.0
4.5
6.0
⎯
⎯
⎯
50
21
18
175
35
30
⎯
⎯
⎯
220
44
37
ns
Maximum clock
frequency
fmax
⎯
50
2.0
4.5
6.0
6
31
36
19
67
79
⎯
⎯
⎯
5
25
29
⎯
⎯
⎯
MHz
Input capacitance
CIN
⎯
⎯
5
10
⎯
10
pF
Output capacitance
COUT
⎯
⎯
13
⎯
⎯
⎯
pF
Power dissipation
capacitance
CPD
(Note)
⎯
⎯
39
⎯
⎯
⎯
pF
Note:
CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
ICC (opr) = CPD・VCC・fIN + ICC/8 (per bit)



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