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TMP86CS49UG bảng dữ liệu(PDF) 207 Page - Toshiba Semiconductor

tên linh kiện TMP86CS49UG
Giải thích chi tiết về linh kiện  8 Bit Microcontroller
PDF  252 Pages
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nhà sản xuất  TOSHIBA [Toshiba Semiconductor]
Trang chủ  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMP86CS49UG bảng dữ liệu(HTML) 207 Page - Toshiba Semiconductor

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Page 193
TMP86CS49UG
Figure 15-15 Example of Transmit/Receive (Transmit) Error Processing
(b) Receive errors
Receive errors occur on the following situation. To protect SIO2RDB and the shift register
contents, the received data is ignored while the SIO2SR<RXERR> is “1”.
• Shift operation is finished before reading out received data from SIO2RDB at
SIO2SR<RXF> is “1” in an external clock operation.
If receive error occurs, set the SIO2CR<SIOS> to “0” for reading the data that received
immediately before error occurence. And read the data from SIO2RDB. Data in shift
register (at errors occur) can be read by reading the SIO2RDB again.
When SIO2SR<RXERR> is cleared to “0” after reading the received data,
SIO2SR<RXF> is cleared to “0”.
After clearing SIO2CR<SIOS> to “0”, when 8-bit serial clock is input to SCK2 pin, re-
ceive operation is stopped. To restart the receive operation, confirm that
SIO2SR<SIOF> is cleared to “0”.
If the received error occurs, set the SIO2CR<SIOINH> to “1” for stopping the receive
operation immediately. In this case, SIO2CR<SIOS>, SIO2SR register, SIO2RDB reg-
ister and SIO2TDB register are initialized.
Writing transmit
data B
Writing transmit
data A
Unknown
B
A7 A6
A
A5 A4 A3 A2 A1 A0 B7 B6 B5 B4 B3 B2 B1 B0
D7 D6 D5 D4 D3 D2 D1 D0 E7 E6 E5 E4 E3 E2 E1 E0 F7 F6 F5 F4 F3 F2 F1 F0
Start shift
operation
Start shift
operation
Start shift
operation
Reading received
data F
Reading received
data E
Reading received
data D
F
E
D
SIO2CR<SIOS>
SIO2SR<SIOF>
SIO2SR<SEF>
SCK2
pin output
SO2 pin
SI2 pin
INTSIO2
interrupt
request
SIO2SR<TXF>
SIO2SR<RXF>
SIO2RDB
SIO2TDB
SIO2SR<TXERR>
SIO2CR<SIOINH>



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