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ADPL40502ACPZ-1.8-R7 bảng dữ liệu(PDF) 5 Page - Analog Devices |
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ADPL40502ACPZ-1.8-R7 bảng dữ liệu(HTML) 5 Page - Analog Devices |
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5 / 17 page ![]() Data Sheet ADPL40502 analog.com Rev. 0 5 of 17 ABSOLUTE MAXIMUM RATINGS TA = 25°C, unless otherwise specified. Table 3. Absolute Maximum Ratings PARAMETER RATING VIN to GND −0.3V to +6.5V VOUT to GND −0.3 V to VIN EN to GND −0.3V to +6.5V Temperature Range Storage −65°C to +150°C Operating Junction −40°C to +125°C Operating Ambient −40°C to +125°C Soldering Conditions JEDEC J-STD-020 Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. Thermal Data Absolute maximum ratings apply individually only, not in combination. The ADPL40502 can be damaged when the junction temperature limits are exceeded. Monitoring ambient temperature does not guarantee that TJ is within the specified temperature limits. In applications with high power dissipation and poor thermal resistance, the maximum ambient temperature may have to be derated. In applications with moderate power dissipation and low printed circuit board (PCB) thermal resistance, the maximum ambient temperature can exceed the maximum limit as long as the junction temperature is within specification limits. TJ of the device is dependent on TA, the power dissipation of the device (PD), and the junction to ambient thermal resistance of the package (θJA). To calculate the maximum TJ from TA and PD use the following equation: TJ = TA + (PD × θJA) The θJA of the package is based on modeling and calculation using a 4-layer board. θJA is highly dependent on the application and board layout. In applications where high maximum PD exists, close attention to thermal board design is required. The value of θJA may vary, depending on PCB material, layout, and environmental conditions. The specified values of θJA are based on a 4-layer, 4 inches × 3 inches circuit board. See JESD51-7 and JESD51-9 for detailed information on the board construction. ΨJB is the junction to board, thermal characterization parameter with units of °C/W. ΨJB of the package is based on modeling and calculation using a 4-layer board. The JESD51-12, Guidelines for Reporting and Using Electronic Package Thermal Information, states that thermal characterization parameters are not the same as thermal resistances. ΨJB measures the component power flowing through multiple thermal paths rather than a single path as in θJB. |
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