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TMP88CS34FG bảng dữ liệu(PDF) 102 Page - Toshiba Semiconductor |
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TMP88CS34FG bảng dữ liệu(HTML) 102 Page - Toshiba Semiconductor |
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102 / 215 page ![]() TMP88CS34/CP34 2007-09-12 88CS34-102 2.9.9 Clocked-synchronous 8-Bit SIO Mode Control The following registers are used to control the serial bus interface (SBI) and monitor the operation in the clocked-synchronous 8-bit SIO mode. Serial Bus Interface Control Register A 7 6 5 4 3 2 1 0 SBICRA (00020H) SIOS SIOINH SIOM “0” SCK (Initial value: 0000 *000) SIOS Indicate transfer start/stop 0: Stop 1: Start SIOINH Continue/abort transfer 0: Continue transfer 1: Abort transfer (automatically cleared after abort) SIOM Transfer mode select 00: 8-bit transmit mode 01: reserved 10: 8-bit transmit/receive mode 11: 8-bit receive mode DV1CK = 0 DV1CK = 1 SCK Serial clock selection (At fc = 16 MHz, Output on SCK pin) 000: 1000.0 kHz 001: 500.0 kHz 010: 250.0 kHz 011: 125.0 kHz 100: 62.5 kHz 101: 31.2 kHz 110: 15.6 kHz 111: External clock (Input from SCK pin) 000: 500.0 kHz 001: 250.0 kHz 010: 125.0 kHz 011: 62.5 kHz 100: 31.2 kHz 101: 15.6 kHz 110: 7.8 kHz 111: External clock (Input from SCK pin) Write only Note 1: fc: High-frequency clock [Hz], *: Don’t care Note 2: Clear the SIOS to “0” and set the SIOINH to “1” when setting the transfer mode and serial clock. Note 3: SBICRA is write-only register and cannot be used with any of read-modify-write instructions such as bit manipulation, etc. Serial Bus Interface Data Register 7 6 5 4 3 2 1 0 SBIDBR (00021H) (Initial value: **** ****) R/W Note1 : The data which was written into SBIDBR cannot be read, since a write buffer and a read buffer are independent in SBIDBR. Therefore, SBIDBR cannot be used with any of read-modify-write instructions such as bit manipulation, etc. Note 2: *: Don’t care Serial Bus Interface Control Register B 7 6 5 4 3 2 1 0 SBICRB (00023H) “0” “0” “0” “1” SBIM SWRST1 SWRST0 (Initial value: **** 0000) SBIM Serial bus interface operation mode selection 00: Port mode (serial bus interface output disable) 01: SIO mode 10: I 2C bus mode 11: reserved SWRST1 SWRST0 Software reset start bit Software reset starts by first writing “10” and next writing “01” Write only Note 1: *: Don’t care Note 2: Switch a mode to port after data transfer is complete. Note 3: Switch a mode to I 2C bus mode or clock synchronous 8-bit SIO mode after confirming that the port is high-level. Note 4: SBICRB is a write-only register and cannot be used with any of read-modify-write instructions such as bit manipulation, etc. Note 5: Clear bit 7 to 5 in SBICRB to “0”, and set bit 4 to “1”. Note 6: When the SWRST (bit 1, 0 in SBICRB) is written to “01”, “10”, software reset is occurred. This time, control the serial bus interface and monitor the operation status registers except the SBIM (bit 3, 2 in SBICRB) and the CHS (bit 6 in PMPXCR) are reseted. Control the serial bus interface and monitor the operation status registers are SBICRA, SBICRB, SBIDBR, I2CAR, SBISRA, SBISRB, SCCRA, SCCRB and SCSR. Figure 2.9.19 Control Register/Data Buffer Register/Status Register in SIO Mode (1) |
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