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AX3984ESA bảng dữ liệu(PDF) 10 Page - AXElite technology co. ltd

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Giải thích chi tiết về linh kiện  23V/3A High Efficiency Synchronous Rectified Step Down DC/DC Converter
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AX3984ESA bảng dữ liệu(HTML) 10 Page - AXElite technology co. ltd

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Axelite Confidential Materials, do not copy or distribute without written consent.
Rev.1.1 Nov.05, 2019
AX3984
(1).Choose an appropriate inductor and output capacitance based on the allowed output voltage
ripple and load transient.
(2).Placing FC as high as possible can respond quickly to the load transient. Considering the output
capacitor’s tolerances and temperature effects, typically place FC approximately 1/10 of FS for the
multi-layer ceramic output capacitor (X5R, X7R). However, if the type of the output capacitor is the
aluminum electrolytic or that largely variable with the temperature, place FC approximately 1/20 of
FS .
(3).Set the compensation RC to zero to cancel the RLOAD COUT pole.
REF
CS
M
OUT
OUT
C
C
V
G
G
V
C
F
2
R
C
LOAD
OUT
C
R
R
C
C
GM: error amp transconductance
GCS: current sense transconductance
(4).Determine CP if required.
If ZESR (zero occurs by output capacitor ESR) is less than FC, it should be cancelled with a pole
set by capacitor CP connected between CC to GND.
C
ESR
OUT
P
R
R
C
C
Application Information
Input Capacitor Selection
It is necessary for the input capacitor to sustain the ripple current produced during the period of
“on” state of the upper MOSFET, so a low ESR is required to minimize the loss. The RMS value of
this ripple can be obtained by the following:
)
D
1
(
D
I
RMS
I
OUT
IN
Where D is the duty cycle, lINRMS is the input RMS current, and IOUT is the load current. The
equation reaches its maximum value with D = 0.5. The loss of the input capacitor can be
calculated by the following equation:
2
IN
CIN
CIN
RMS
I
ESR
P
Where PCIN is the power loss of the input capacitor and ESRCIN is the effective series resistance of



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