UPSD3422EB40U6 datasheet(246/293 Pages) STMICROELECTRONICS

246 / 293 page

PSD module

uPSD34xx

246/293

28.5.53

Forced power-down (FDP)

An alternative to APD is FPD. The resulting power-savings is the same, but the PDN signal

in Figure 89 on page 247 is set and Power-Down mode is entered immediately when

firmware sets the FORCE_PD Bit to logic '1' in the csiop Register PMMR3 (Bit 1). FPD will

override APD counter activity when FORCE_PD is set. No external clock source for the APD

counter is needed. The FORCE_PD Bit is cleared only by a reset condition.

Caution must be used when implementing FPD because code memory goes off-line as

soon as PSD Module Power-Down mode is entered, leaving the MCU with no instruction

stream to execute.

The MCU Module must put itself into Power-Down mode after it puts the PSD Module into

Power-Down Mode. How can it do this if code memory goes off-line? The answer is the Pre-

Fetch Queue (PFQ) in the MCU Module. By using the instruction scheme shown in the 8051

assembly code example in Table 147, the PFQ will be loaded with the final instructions to

command the MCU Module to Power Down mode after the PDS Module goes to Power-

Down mode. In this case, even though the code memory goes off-line in the PSD Module,

the last few MCU instruction are sourced from the PFQ.

Table 147.

Forced power-down example

PDOWN:

ANL

A8h, #7Fh

; disable all interrupts

ORL

9Dh, #C0h

; ensure PFQ and BC are enabled

MOV

DPTR, #xxC7

; load XDATA pointer to select PMMR3 register (xx

= base

; address of csiop registers)

CLR

; clear A

JMP

LOOP

; first loop - fill PFQ/BQ with Power Down

instructions

NOP

; second loop - fetch code from PFQ/BC and set

Power-

; Down bits for PSD Module and then MCU

Module

LOOP:

MOVX

@DPTR, A

; set FORCE_PD Bit in PMMR3 in PSD Module in

second

; loop

MOV

87h, A

; set PD Bit in PCON Register in MCU Module in

second

; loop

MOV

A, #02h

; set power-down bit in the A Register, but not in

PMMR3 or

; PCON yet in first loop

JMP

LOOP

; uPSD enters into Power-Down mode in second

loop

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