TMPR3916 datasheet(123/225 Pages) TOSHIBA

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Chapter 7 CAN Module (TXCAN)

Preliminary

7-2

7.1

Block Diagram

Interrupt Logic

CAN Protocol Controller

TXCAN State Machine

MCU

Interface

Access

Arbiter

Mailbox RAM

16* 128

Temporary Transmit

Buffer

Acceptance

Filter

Time Stamp

Counter

Reset Controller,

Clock & Sleep

Logic

Address / Data

Control Signals

Goes to the whole design

Rx/Tx

Control

Add/

Data

Clock/

Reset

TXCAN

Temporary Receive

Buffer

Figure 7.1.1 Block Diagram CAN Module

7.1.1

Message Buffers

The message storage is implemented in a single-port RAM, which can be addressed by the inner

CAN core and the MCU. The MCU controls the CAN controller by modifying the various mailboxes in

the RAM or the configuration registers.

In order to initiate a transfer, the transmission request bit has to be set in the corresponding register.

Afterwards the entire transmission procedure and possible error handling is done without any MCU

involvement. If a mailbox has been configured as receive the MCU reads the mailbox data using MCU

read instructions. The mailbox can be configured to interrupt the MCU after every successful message

transmission or reception.

The mailbox module provides 16 mailboxes of 8-byte data length, 29 bit identifier and several control

bits. Each mailbox can be configured as either transmit or receive, except for mailbox 15. This mailbox

is a receive-only buffer with a special acceptance mask designed to select groups of message identifiers

to be received.

The mailbox area is implemented in a single-port-RAM.

7.1.2

Electrical CAN-Interface

The interface to the CAN bus is a simple two-wire line consisting of an input pin Rx and an output

pin Tx. The pins are thought to operate with CAN bus transceivers according to ISO/DIS 11989 (e.g.

Philips PCA 82C252, Bosch CF150 or Siliconix SI 9200).

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