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TPD7203F bảng dữ liệu(PDF) 4 Page - Toshiba Semiconductor

tên linh kiện TPD7203F
Giải thích chi tiết về linh kiện  Power MOSFET Gate Driver for 3-Phase DC Motor
PDF  19 Pages
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Trang chủ  http://www.semicon.toshiba.co.jp/eng
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TPD7203F bảng dữ liệu(HTML) 4 Page - Toshiba Semiconductor

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TPD7203F
2006-10-31
4
Truth Table
(All outputs go to low for input in high-side/low-side arm shorting mode)
Input
Output
Mode
No.
In1
(UU)
In2
(VU)
In3
(WU)
In4
(UB)
In5
(VB)
In6
(WB)
Out
UU
Out
VU
Out
WU
Out
UB
Out
VB
Out
WB
Remarks
01
L
L
L
L
L
L
L
L
L
L
L
L
02
H
L
L
L
L
L
H
L
L
L
L
L
03
L
H
L
L
L
L
L
H
L
L
L
L
04
L
L
H
L
L
L
L
L
H
L
L
L
05
L
L
L
H
L
L
L
L
L
H
L
L
06
L
L
L
L
H
L
L
L
L
L
H
L
07
L
L
L
L
L
H
L
L
L
L
L
H
08
H
L
L
H
L
L
L
L
L
L
L
L
High-side/low-side arm shorting mode *
09
H
L
L
L
H
L
H
L
L
L
H
L
120° square wave conducting normal mode
10
H
L
L
L
L
H
H
L
L
L
L
H
120° square wave conducting normal mode
11
L
H
L
H
L
L
L
H
L
H
L
L
120° square wave conducting normal mode
12
L
H
L
L
H
L
L
L
L
L
L
L
High-side/low-side arm shorting mode *
13
L
H
L
L
L
H
L
H
L
L
L
H
120° square wave conducting normal mode
14
L
L
H
H
L
L
L
L
H
H
L
L
120° square wave conducting normal mode
15
L
L
H
L
H
L
L
L
H
L
H
L
120° square wave conducting normal mode
16
L
L
H
L
L
H
L
L
L
L
L
L
High-side/low-side arm shorting mode *
17
H
H
L
L
L
L
H
H
L
L
L
L
18
L
H
H
L
L
L
L
H
H
L
L
L
19
H
L
H
L
L
L
H
L
H
L
L
L
20
L
L
L
H
H
L
L
L
L
H
H
L
21
L
L
L
L
H
H
L
L
L
L
H
H
22
L
L
L
H
L
H
L
L
L
H
L
H
23
H
H
L
H
L
L
L
L
L
L
L
L
High-side/low-side arm shorting mode *
24
H
H
L
L
H
L
L
L
L
L
L
L
High-side/low-side arm shorting mode *
25
H
H
L
L
L
H
H
H
L
L
L
H
26
L
H
H
H
L
L
L
H
H
H
L
L
27
L
H
H
L
H
L
L
L
L
L
L
L
High-side/low-side arm shorting mode *
28
L
H
H
L
L
H
L
L
L
L
L
L
High-side/low-side arm shorting mode *
29
H
L
H
H
L
L
L
L
L
L
L
L
High-side/low-side arm shorting mode *
30
H
L
H
L
H
L
H
L
H
L
H
L
*:
High-side/low-side arm shorting mode is disabled by the internal logic. (FAULT is kept low.) When
undervoltage (6 V typ.) is detected, all outputs are pulled low regardless of input signals. At this time, FAULT
output goes high (open-drain, high-impedance).



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