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ST62T80B bảng dữ liệu(PDF) 61 Page - STMicroelectronics

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ST62T80B/E80B
LCD CONTROLLER-DRIVER (Cont”d)
4.7.3 Stand by or STOP operation mode
No clock from the main oscillator is available in
STOP mode for the LCD controller, and the con-
troller is switched off when the STOP instruction is
executed. All segment and common lines are then
switched to ground to avoid any DC biasing of the
LCD elements.
Operation in STOP mode remain possible by
switching to the OSC32Khz, by setting the
HF0..HF2 bit of LCDCR accordingly (Table 23).
Care must be taken for the oscillator switching that
LCD function change is only effective at the end of
a frame. Therefore it must be guaranteed that
enough clock pulses are delivered before entering
into STOP mode. Otherwise the LCD function is
switched off at STOP instruction execution.
Table 23. Oscillator Source Selection
4.7.4 LCD Mode Control Register (LCDCR)
Address: DCh - Read/Write
Bits 7-6 = MUX16, MUX11. Multiplexing ratio se-
lect bits. These bits select the number of common
backplanes used by the LCD control.
Bits 5-3 = HF0, HF1, HF2. Oscillator select bits.
These bits allow the LCD controller to be supplied
with the correct frequency when different high
main oscillator frequencies are selected as system
clock. Table 20 shows the set-up for different clock
crystals.
Bits 2 = Reserved.
Bits 1-0 = LF0, LF1. Base frame frequency select
bits. These bits control the LCD base operational
frequency of the LCD common lines.
LF0, LF1 define the 32KHz division factor as
shown in Table 24.
Table 24. 32KHz Division Factor for Base
Frequency Selection
HF2
HF1
HF0
Division Factor
0
0
0
Clock disabled: Display off
0
0
1
Auxiliary 32KHz oscillator
0
1
0
Reserved
1
1
1
Reserved
Others
Division from MCU fINT
70
MUX16
MUX11
HF2
HF1
HF0
-
LF1
LF0
LF1
LF0
32KHz Division Factor
0
0
512
0
1
386
1
0
256
1
1
192
0
0
128
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