công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

L6731B bảng dữ liệu(PDF) 11 Page - STMicroelectronics

tên linh kiện L6731B
Giải thích chi tiết về linh kiện  Adjustable step-down controller with synchronous rectification Dedicated to DDR Memory
PDF  24 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L6731B bảng dữ liệu(HTML) 11 Page - STMicroelectronics

Back Button L6731B Datasheet HTML 7Page - STMicroelectronics L6731B Datasheet HTML 8Page - STMicroelectronics L6731B Datasheet HTML 9Page - STMicroelectronics L6731B Datasheet HTML 10Page - STMicroelectronics L6731B Datasheet HTML 11Page - STMicroelectronics L6731B Datasheet HTML 12Page - STMicroelectronics L6731B Datasheet HTML 13Page - STMicroelectronics L6731B Datasheet HTML 14Page - STMicroelectronics L6731B Datasheet HTML 15Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 11 / 24 page
background image
L6731B
Device description
11/24
5.3
Bypassing the LDO to avoid the voltage drop with low Vcc
If VCC
≈ 5V the internal LDO works in dropout with an output resistance of about 1Ω. The
maximum LDO output current is about 100mA and so the output voltage drop is 100mV, to
avoid this the LDO can be bypassed.
5.4
Internal and external references
It is possible to set the internal/external reference and the switching frequency by setting the
proper voltage at the DDR-IN pin. The maximum value of the external reference is 2.5V (typ.):
●
VEAREF from 0% to 80% of VCCDR -> External reference/FSW = 250KHz
●
VEAREF from 80% to 95% of VCCDR -> VREF = 0.6V/FSW=500KHz
●
VEAREF from 95% to 100% of VCCDR -> VREF = 0.6V/FSW=250KHz
Providing an external reference from 0V to 450mV the output voltage will be regulated but
some restrictions must be considered:
●
The minimum OVP threshold is set at 300mV;
●
The under-voltage-protection doesn't work;
●
The PGOOD signal remains low;
To set the resistor divider it must be considered that a 100K pull-down resistor is integrated into
the device (see Figure 5.). Finally it must be taken into account that the voltage at the
DDR-IN
pin is captured by the device at the start-up when VCC is about 4V.
Figure 4.
Bypassing the LDO



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24


bảng dữ liệu tải về

Go To PDF Page


Link URL



Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Liên kết đến bảng dữ liệu    |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com