DS1WM

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The operation of the 1-Wire bus is described in detail in the Book of iButton

the details of that will not be discussed in this document. Each slave device, in general, has its own set of

commands that are described in detail in that device’s data sheet. The user is referred to those documents

for detail on specific slave implementations.

BLOCK DIAGRAM

INTERRUPT REGISTER

INT ENABLE REGISTER

DATA BUS

BUFFER

CONTROL

LOGIC

MASTER

RESET

1-WIRE

TIMING

AND

CONTROL

INTERRUPT

CONTROL

LOGIC

DQ

A0

MR

D0-D7

INTR

A1

A2

ADS

RD

WR

EN

CLK

CLOCK

DIVIDER

COMMAND REGISTER

TRANSMIT BUFFER

Tx SHIFT REGISTER

Rx SHIFT REGISTER

RECEIVE BUFFER

CLOCK DIV REGISTER

CONTROL REGISTER

OWSTPZ

PIN DESCRIPTIONS

The following describes the function of all the block I/O pins. In the following descriptions, 0 represents

logic low and 1 represents logic high.

A0, A1, A2, Register Select: Address signals connected to these three inputs select a register for the CPU

to read from or write to during data transfer. A table of registers and their addresses is shown below.

iButton is a registered trademark of Dallas Semiconductor Corp., a wholly owned subsidiary of Maxim Integrated Products, Inc.