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CS4239 bảng dữ liệu(PDF) 49 Page - Cirrus Logic

tên linh kiện CS4239
Giải thích chi tiết về linh kiện  CrystalClear??Portable ISA Audio System
PDF  98 Pages
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nhà sản xuất  CIRRUS [Cirrus Logic]
Trang chủ  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS4239 bảng dữ liệu(HTML) 49 Page - Cirrus Logic

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MIMR
Mono Input Mute to the Right Output
mixer. When set to 1, the MIN signal
to the right output mixer is muted.
The default state of this bit is set by
MIM in the Hardware Configuration
Data, Mono & DSP Port byte.
Right Input Mixer Control (X5)
Default = x00xxxxx
D7
D6
D5
D4
D3
D2
D1
D0
rbc
RIS1
RIS0
res
res
res
res
res
RIS1-RIS0
Right Input Mixer Summer Attenuator.
This attenuates the inputs to the
right input mixer to enable overload
protection when multiple input
sources are utilized.
00 - 0 dB
01 - -6 dB
10 - -12 dB
11 - -18 dB
Left FM Synthesis Mute (X6)
Default = exxxxxxx
D7
D6
D5
D4
D3
D2
D1
D0
LFMM
res
rbc
rbc
rbc
rbc
rbc
rbc
LFMM
Left FM mute. When set to 1, the
left internal FM input to DAC2 is
muted. The default state of this bit is
the inverse of IFM in the Hardware
Configuration Data, Global Configura-
tion byte.
Right FM Synthesis Mute (X7)
Default = exxxxxxx
D7
D6
D5
D4
D3
D2
D1
D0
RFMM
res
rbc
rbc
rbc
rbc
rbc
rbc
RFMM
Right FM mute. When set to 1, the
right internal FM input to DAC2 is
muted. The default state of this bit is
the inverse of IFM in the Hardware
Configuration Data, Global Configura-
tion byte.
Left DSP Serial Port Mute (X8)
Default = exxxxxxx
D7
D6
D5
D4
D3
D2
D1
D0
LSPM
res
rbc
rbc
rbc
rbc
rbc
rbc
LSPM
Left DSP Serial Port Mute. When set
to 1, the Left DSP Serial Port input
(SDIN) is muted. The default state of
this bit is the inverse of SPE in the
Hardware Configuration Data, Mono
& DSP Port byte.
Right DSP Serial Port Mute (X9)
Default = exxxxxxx
D7
D6
D5
D4
D3
D2
D1
D0
RSPM
res
rbc
rbc
rbc
rbc
rbc
rbc
RSPM
Right DSP Serial Port Mute. When
set to 1, the Right DSP Serial Port
input (SDIN) is muted. The default
state of this bit is the inverse of SPE
in the Hardware Configuration Data,
Mono & DSP Port byte.
Reserved (X10)
Default = xxxxxxxx
D7
D6
D5
D4
D3
D2
D1
D0
rbc
res
rbcrbc
rbcrbc
rbcrbc
rbc
Reserved, backwards compatible.
DAC1 Mute and IFSE Enable (X11)
Default = 110xxxxx
D7
D6
D5
D4
D3
D2
D1
D0
LD1IM
RD1IM
IFSE
res
res
res
res
res
IFSE
Independent Sample Freq. Enable.
When set to 1, the extended
registers X12 and X13 are used to
set the sample rate, and registers I8,
I10 (OSM1,0), and I22 are ignored.
X12 and X13 cannot be modified un-
less this bit is set to 1.
RD1IM
Right DAC1 Input Mixer Mute.
When set to 1, the output from the
Right DAC1 is muted to the Right in-
put mixer. See Figure 4.
DS253PP2
CS4239
CrystalClear Portable ISA Audio System
TM
49



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