CMOS High Voltage Logic – CD4081B

 

Quad 2-Input AND Gate Logic IC in bare die form

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Die Size (Unsawn)

1550 x 1500

61 x 59

µm

mils

Minimum Bond Pad Size

106 x 106

4.17 x 4.17

µm

mils

Die Thickness

350 (±20)

13.78 (±0.79)

µm

mils

Top Metal Composition

Al 1%Si 1.1µm

Back Metal Composition

N/A – Bare Si

High Input Voltage up to 20V

Symmetrical Output Characteristics

Max input current 1µA at 18V over full Military

Temperature Range

Low Power TTL compatible

Specified at 5V, 10V & 15V

Direct drop-in replacement for obsolete

components in long term programs.  

Rev 1.0

21/11/17

Features:

Description

The CD4081B Quad 2-Input AND Gate is fabricated

using a 3µm 15CMOS process. The device has equal

source and sink current capabilities and conforms to

standard B series output drive. Device outputs are

buffered which improves transfer characteristics by

providing very high gain. The device is capable of

driving x2 low power TTL loads or x1 LSTTL load.

Ordering Information

Die Dimensions in µm (mils)

1550 (61)

The following part suffixes apply:

No suffix - MIL-STD-883 /2010B Visual Inspection

“H” - MIL-STD-883 /2010B Visual Inspection

+ MIL-PRF-38534 Class H LAT

“K” - MIL-STD-883 /2010A Visual Inspection (Space)

+ MIL-PRF-38534 Class K LAT

LAT = Lot Acceptance Test.

For further information on LAT process flows see below.

www.siliconsupplies.com\quality\bare-die-lot-qualification

Supply Formats:

Mechanical Specification

Default – Die in Waffle Pack (100 per tray capacity)

Sawn Wafer on Tape – On request

Unsawn Wafer – On request

Die Thickness <> 350µm(14 Mils) – On request

Assembled into Ceramic Package – On request

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