RT9701PBL datasheet(9/10 Pages) RICHTEK

9 / 10 page

RT9701

DS9701-13 March 2007

www.richtek.com

In choosing these capacitors, special attention must be

paid to the Effective Series Resistance, ESR, of the

capacitors to minimize the IR drop across the capacitor

ESR. A lower ESR on this capacitor can get a lower IR

drop during the operation.

Ferrite beads in series with all power and ground lines are

recommended to eliminate or significantly reduce EMI. In

selecting a ferrite bead, the DC resistance of the wire

used must be kept to a minimum to reduce the voltage

drop.

Reverse current preventing

The output MOSFET and driver circuitry are also designed

to allow the MOSFET source to be externally forced to a

higher voltage than the drain (VOUT > VIN

≥ 0).To prevent

reverse current from such condition, disable the switch

(RT9701CB) or connect VIN to a fixed voltage under 1.3V.

Layout and Thermal Dissipation

Place the switch as close to the USB connector as

possible. Keep all traces as short as possible to reduce

the effect of undesirable parasitic inductance.

Place the ot capacitor and ferrite beads asclose to the

USB connector as possible.

If ferrite beads are used, use wires with minimum

resistance and large solder pads to minimize

connection resistance.

If the package is with dual VOUT or VIN pins, short

both the same function pins as Figure 1 or Figure 2 to

reduce the internal turn-on resistance. If the output

power will be delivered to two individual ports, it is

specially necessary to short both VOUT pin at the

switch output side in order to protect the switch when

each port are plug-in separately.

Under normal operating conditions, the package can

dissipate the channel heat away. Wide power-bus

planes connected to VIN and VOUT and a ground plane

in contact with the device will help dissipate additional

heat.

RT9701PBL bảng dữ liệu(PDF) 9 Page - Richtek Technology Corporation