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RT9218BGS bảng dữ liệu(PDF) 6 Page - Richtek Technology Corporation |
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RT9218BGS bảng dữ liệu(HTML) 6 Page - Richtek Technology Corporation |
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6 / 17 page ![]() RT9218B 6 DS9218B-09 March 2007 www.richtek.com Parameter Symbol Test Conditions Min Typ Max Units Error Amplifier (GM) E/A Transconductance gm -- 0.2 -- ms Open Loop DC Gain AO -- 90 -- dB Linear Regulator DRV Driver Source IDS VDRV = 6V -- 1.4 -- mA Reference Voltage VREFREG VCC = 12V 0.792 0.8 0.808 V PWM Controller Gate Drivers (VCC = 12V) Upper Gate Source IUGATE VBOOT − VPHASE = 12V VUGATE − VPHASE = 6V 0.6 1 -- A Upper Gate Sink RUGATE VBOOT − VPHASE = 12V VUGATE − VPHASE = 1V -- 4 -- Ω Lower Gate Source ILGATE VCC = 12V, VLGATE = 6V 0.6 1 -- A Lower Gate Sink RLGATE VCC = 12V, VLGATE = 1V -- 3 4 Ω Dead Time TDT -- -- 100 ns Protection FB Under-Voltage Trip ΔFBUVT FB Falling 70 75 80 % FBL Under-Voltage Trip ΔFBLUVT FB and FBL Falling 70 75 80 % OC Current Source IOC VPHASE = 0V -- 40 -- μA Soft-Start Interval TSS -- 3.5 -- ms Power Good Power Good Rising Threshold VCC = 12V -- 90 -- % Power Good Hysteresis VCC = 12V -- 10 -- % PG Sink Capability VCC = 12V, 1mA -- 0.2 0.4 V Power Good Rising Delay VCC = 12V 1 3 10 ms Power Good Falling Delay VCC = 12V -- 15 -- us Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. Devices are ESD sensitive. Handling precaution recommended. Note 3. The device is not guaranteed to function outside its operating conditions. Note 4. θJA is measured in the natural convection at TA = 25°C on a low effective thermal conductivity test board of JEDEC 51-3 thermal measurement standard. |
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