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RT9199GS bảng dữ liệu(PDF) 10 Page - Richtek Technology Corporation |
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RT9199GS bảng dữ liệu(HTML) 10 Page - Richtek Technology Corporation |
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10 / 13 page ![]() RT9199 10 DS9199-07 September 2007 www.richtek.com The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula: PD(MAX) = ( TJ(MAX) − TA ) / θJA Where TJ(MAX) is the maximum operation junction temperature 125 °C, TA is the ambient temperature and the θJA is the junction to ambient thermal resistance. The junction to ambient thermal resistance for SOP-8 package (Exposed Pad) is 86 °C/W, on standard JEDEC 51-7 (4 layers, 2S2P) thermal test board. The maximum power dissipation at TA = 25 °C can be calculated by following formula: PD(MAX) = (125 °C − 25°C) / 86°C/W = 1.163W Figure 8 shows the package sectional drawing of SOP-8 (Exposed Pad). Every package has several thermal dissipation paths. As show in Figure 9, the thermal resistance equivalent circuit of SOP-8 (Exposed Pad). The path 2 is the main path due to these materials thermal conductivity. We define the exposed pad is the case point of the path 2. Figure 8. SOP-8 (Exposed Pad) Package Sectional Drawing Ambient Molding Compound Gold Line Lead Frame Die Pad Case (Exposed Pad) PCB The thermal resistance θJA of SOP-8 (Exposed Pad) is determined by the package design and the PCB design. However, the package design has been decided. If possible, it’ s useful to increase thermal performance by the PCB design. The thermal resistance can be decreased by adding copper under the expose pad of SOP-8 package. Figure 10 show the relation between thermal resistance θJA and copper area on a standard JEDEC 51-7 (4 layers, 2S2P) thermal test board at TA = 25 °C. We have to consider the copper couldn’ t stretch infinitely and avoid the tin overflow. We use the “Dog-Bone” copper patterns on the top layer as Figure 11. 0 10 20 30 40 50 60 70 80 90 100 0 10 2030 405060 7080 Copper Area (mm 2) Figure 10. Relation Between Thermal Resistance θ JA and Copper Area Figure 11. Dog-Bone Layout Exposed Pad W≦2.28mm Figure 9. Thermal Resistance Equivalent Circuit Junction R DIE R DIE-ATTACH RDIE-PAD R GOLD-LINE R LEAD FRAME Case (Exposed Pad) R PCB R PCB Ambient R MOLDING-COMPOUND path 1 path 2 path 3 |
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