King Billion Electronics Co., Ltd.

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HE89C21

HE80000 SERIES

January 20, 2003

6

V1.0E

6.1. LCDC Control register

LCD Control Register LCDC controls the functions of LCD driver; such as contrast level, LCD

waveform type, On/Off, Blank or not, etc.

LCDC

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

Field

-

-

-

-

-

TYPE BLANK LCDE

Field

Value Function

TYPE

0

Select Type A LCD waveform

1

Select Type B LCD waveform

BLANK

0

Normal display

1

LCD display blanked. LCD driver changes only COM output signal, SEG

signal remains unchanged.

LCDE

0

LCD driver disabled, LCD driver has no output signal.

1

LCD driver Enabled

Please note that LCD driver must be turned off before the entering sleep mode. That means user must

clear the bit 0 of LCDC to turn off LCD driving circuit before setting bit6 of OP1 to enter sleep mode.

Large current might happen if the procedure is not followed.

Please also note that LCD driver uses slow clock as clock source. The LCD display will not display

normally if it works in Fast clock only mode because the LCD refresh action is too fast.

7. LCD RAM Map

PP=0 COM3 COM2 COM1 COM0 COM3 COM2 COM1 COM0

bit7(C3) bit6(C2) bit5(C1) bit4(C0) bit3(C3) bit2(C2) bit1(C1) bit0(C0)

F0h

S1

S0

F1h

S3

S2

F2h

S5

S4

F3h

S7

S6

F4h

S9

S8

F5h

S11

S10

F6h

S13

S12

F7h

S15

S14

F8h

S17

S16

F9h

S19

S18

FAh

S21

S20

FBh

S23

S22

FCh

S25

S24

FDh

S27

S26

FEh

S29

S28

FFh

S31

S30