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MP8690 bảng dữ liệu(PDF) 6 Page - Monolithic Power Systems |
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MP8690 bảng dữ liệu(HTML) 6 Page - Monolithic Power Systems |
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6 / 14 page ![]() MP86905 – INTELLI-PHASE SOLUTION W/ INTEGRATED MOSFETS AND DRIVERS MP86905 Rev. 1.1 www.MonolithicPower.com 6 8/31/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. PIN FUNCTIONS Pin # Name Description 1 BST Bootstrap. BST requires a 0.1µF to 1µF capacitor to drive the high-side power switch’s gate above the supply voltage. Connect the capacitor between BST and SW to form a floating supply across the power switch driver. 2, 14 VIN Supply voltage. Place CIN close to the device to support the switching current and reduce voltage spikes at input. 3, 4 SW Phase node. 5 - 13 PGND Power ground. 15 PWM Pulse width modulation input. Leave PWM floating or drive PWM to mid-state to enter diode emulation mode. 16 EN Enable. Pull EN low to disable the device and place SW in a high impedance state. 17 CS Current sense output. 18 VTEMP Junction temperature sense output. 19 SYNC Diode emulation mode. Pull SYNC low to enable diode emulation mode. 20 VDD Internal circuitry voltage. Connect VDD to VDRV through a 2.2Ω resistor and decouple with a 1µF capacitor to AGND. 21 AGND Analog ground. Connect AGND to PGND on the VDD capacitor. 22 VDRV Driver voltage. Connect VDRV to a 3.3V supply and decouple with a 1µF to 4.7µF ceramic capacitor close to VDRV to PGND. 23 FAULT# Fault report. FAULT# is an open drain, active low. FAULT# pulls low when SW short detection, HS current limit, or over-temperature is triggered. During a cycle-by- cycle high-side current limit event, FAULT# is kept high until the fourth cycle. |
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