This Data Sheet may be revised by subsequent versions

©2004 Eon Silicon Solution, Inc., www.essi.com.tw

or modifications due to changes in technical specifications.

19

EN25F80

Rev. D, Issue Date: 2007/05/16

When used only to release the device from the power-down state, the instruction is issued by driving the

CS# pin low, shifting the instruction code “ABh” and driving CS# high as shown in Figure 16. After the

When used only to obtain the Device ID while not in the power-down state, the instruction is initiated by

driving the CS# pin low and shifting the instruction code “ABh” followed by 3-dummy bytes. The Device ID

bits are then shifted out on the falling edge of CLK with most significant bit (MSB) first as shown in Figure

17. The Device ID value for the EN25F80 are listed in Table 5. The Device ID can be read continuously.

The instruction is completed by driving CS# high.

When Chip Select (CS#) is driven High, the device is put in the Stand-by Power mode. If the device was

not previously in the Deep Power-down mode, the transition to the Stand-by Power mode is immediate. If

the device was previously in the Deep Power-down mode, though, the transition to the Standby Power

in Table 10. Once in the Stand-by Power mode, the device waits to be selected, so that it can receive,

decode and execute instructions.

Except while an Erase, Program or Write Status Register cycle is in progress, the Release from Deep

Power-down and Read Device ID (RDI) instruction always provides access to the 8bit Device ID of the

device, and can be applied even if the Deep Power-down mode has not been entered.

Any Release from Deep Power-down and Read Device ID (RDI) instruction while an Erase, Program or

Write Status Register cycle is in progress, is not decoded, and has no effect on the cycle that is in

progress.

Figure 16. Release Power-down Instruction Sequence Diagram

Figure 17. Release Power-down / Device ID Instruction Sequence Diagram