MTS Stereo Encoder, Rev. 0.5

Freescale Semiconductor

PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE

9

Functional Description

7

Functional Description

The following sections provide brief descriptions of the MC44C401L modules.

7.1 Phase Locked Loop (APLL)

The APLL, shown in Figure 5, locks to the reference frequency of 12 MHz and generates the master clock.

Figure 5. APLL and Clock Generator

7.2 Sync Separator

The Sync Separator, shown in Figure 6, extracts the composite sync from the incoming composite video signal.

The composite sync is used by the Audio Processor to generate the 15.734 kHz pilot tone and the 31.468 kHz carrier

and the sync amplitude is 0.3 V.

Figure 6. Sync Separator

Clock

Generator

APLL

MC44C401L

384 MHz

Oscillator

12MHz

Ref Clk

2M

÷

VCO

XTALOUT

XTALIN

22pF

22pF

Audio

Processor

Sync

Separator

MC44C401L

1M

470pF

0.1µF

CVBS IN

1K

CVBS