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OPA277

V

DD

V

DD

+15 V

U2

GND

R

OFS

R

FB

V

OUT

I

OUT

V

REF

V+

−15 V

V−

U1

DAC8820

t

WR

t

DS

t

DH

t

LWD

t

LDAC

t

RST

WR

DATA

LDAC

RST

DAC8820

SBAS358C – AUGUST 2005 – REVISED JUNE 2006

THEORY OF OPERATION (continued)

Figure 39. Voltage Output Configuration

Figure 40. DAC8820 Timing Diagram

Table 1. Function of Control Inputs

CONTROL INPUTS

RST

WR

LDAC

REGISTER OPERATION

Asynchronous operation. Reset the input and DAC register to a predetermined value. The DAC8820

0

X

X

is reset to all 0s.

1

0

0

Load the input register with all 16 data bits.

1

1

1

Load the DAC register with the contents of the input register.

1

0

1

The input and DAC register are transparent.

LDAC and WR are tied together and programmed as a pulse. The 16 data bits are loaded into the

1

input register on the falling edge of the pulse and then loaded into the DAC register on the rising

edge of the pulse.

1

1

0

No register operation.

13

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