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GL852 bảng dữ liệu(PDF) 18 Page - GENESYS LOGIC |
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GL852 bảng dữ liệu(HTML) 18 Page - GENESYS LOGIC |
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18 / 31 page ![]() GL852 USB 2.0 MTT HUB Controller ©2000-2007 Genesys Logic Inc. - All rights reserved. Page 18 USB2.0 HOST/HUB REPEATER TT USPORToperating in HS signaling HS vs. FS/LS: Traffic channel is routed to TT HS vs. HS: Traffic channel is routed to REPEATER DSPORT operating in HS signaling DSPORT operating in FS/LS signaling TT Figure 5.2 - Operating in USB 2.0 scheme 5.12 DSPORT logic DSPORT (downstream port) logic implements the control logic defined in section 11.5 of USB specification Revision 2.0. It mainly manipulates the state machine, the connection/disconnection detection, over current detection and power enable control, and the status LED control of the downstream port. Besides, it also output the control signals to the DSPORT transceiver. 5.13 DSPORT Transceiver DSPORT transceiver is the analog circuit that supports high-speed, full-speed, and low-speed electrical characteristics defined in chapter 7 of USB specification Revision 2.0. In addition, each DSPORT transceiver accurately controls its own squelch level to detect the detachment and attachment of devices. 5.2 Configuration and I/O Settings 5.2.1 RESET# Setting GL852 integrates in the pull-up 1.5K resister of the upstream port. When RESET# is enabled, the internal 1.5K pull-up resister will be disconnected to the 3.3V power. To meet the requirement (p.141) of the USB 2.0 specification, pull-up resister should be disconnected while lacking of USB cable power (Vbus). Therefore, we suggest designing the RESET# circuit as following figure to meet the requirement mentioned above. |
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