GL828 USB 2.0 SD/MMC Single Slot Card Reader Controller

©2000-2006 Genesys Logic Inc. - All rights reserved.

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CHAPTER 5

FUNCTION DESCRIPTION

UTM

The USB 2.0 Transceiver Macrocell is the analog circuitry that handles the low level USB protocol and signaling,

and shifts the clock domain of the data from the USB 2.0 rate to one that is compatible with the general logic.

SIE

The Serial Interface Engine, which contains the USB PID and address recognition logic, and other sequencing

and state machine logic to handle USB packets and transactions.

EPFIFO

Endpoint FIFO includes Control FIFO (FIFO0), interrupt FIFO (FIFO3), Bulk In/Out FIFO (BULKFIFO)

Control FIFO

FIFO of control endpoint 0.

It is 64-byte FIFO, and it is used for endpoint 0 data transfer.

Interrupt FIFO

64-byte depth FIFO of endpoint 3 for status interrupt

Bulk In/Out FIFO It can be in the TX mode or RX mode:

1. It contains ping-pong FIFO (512 bytes each bank) for transmit/receive data continuously.

2. It can be directly accessed by Uc

MHE

It contains 1 MIF (Media Interface)

MIF

SD / MMC

Remote wakeup

Support Card insert wakeup while suspend.

External reset circuit

Non-inverting, Schmitt input with weak pull-up using DVDD power.

CLOCK Source Selection

It selects 12/48 MHz input by exterior pull resistor.