STVM100 datasheet(16/27 Pages) STMICROELECTRONICS

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DC and AC parameters

STVM100

16/27

Figure 9.

Bus timing requirements sequence

Table 8.

AC characteristics

Sym

Description

Test Condition(1)

Valid for ambient operating temperature: TA = –40 to 85°C; VDD = 3.0V to 3.6V; AVDD = 10V;

OUT = 1/2AVDD; RSET = 24.9kΩ (except where noted, see Figure 9).

Min

Typ

Max

Unit

fSCL

SCL clock frequency

400

kHz

tLOW

Clock low period

1.3

µs

tHIGH

Clock high period

0.6

µs

tSU:DAT

Data setup time

100

tHD:DAT Data hold time

900

SDA and SCL rise time

Dependent on load (see

Table 6 on page 14)

20 +

0.1Cb

300

SDA and SCL fall time

300

tBUF

Bus free time before

new transmission can

start

1.3

µs

tDSP

I2C spike rejection filter

pulse width

050

tSU:STA

Repeated start

condition setup time

0.6

µs

tHD:STA

Repeated start

condition hold time

0.6

µs

tSU:STO

Stop condition setup

time

0.6

µs

WRITE cycle time

100

AI00589

SDA

tSU:ST

tSU:STA

tHD:STA

SCL

tSU:DAT

tHD:DAT

tHIGH

tLOW

tHD:STA

tBUF

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