© 2006 Semtech Corp.

POWER MANAGEMENT

SC614

United States Patent No. 6,504,422

www.semtech.com

14

Applications Information (Cont.)

Layout Guidelines

The following layout is suggested (shown as three-layer (top, bottom and ground layer) only for clarity). C1 is the

input capacitor which should be placed close to pin 17. C2 is the output capacitor which should be placed close to

pin 16. The capacitors C3 and C4 are the bucket capacitors which can carry up to the full load current of 434mA

pulsed for one half clock cycle (at either 250kHz or 1.33MHz depending upon selected operating frequency).

Multiple vias should be used whenever it is necessary to change layers on nets connecting to CIN, VOUT, C1+,

C1-, C2+ and C2-. As mentioned before, the thermal pad should connect to ground using multiple vias, with 4 vias

recommended.

Top Copper and Top Silkscreen

Layout Guidelines Schematic

C2

1u

C1

2u2

C3 1u

C4 1u

VIN

11

VIN

17

EN

2

SDA

7

SCL

8

ASEL

5

SDIM

3

MDIM

4

FL

6

VOUT

9

VOUT

16

M1

1

M2

24

M3

23

M4

22

S1/FL3

20

S2/FL2

19

S3/FL1

18

GND

12

GND

21

U1

SC614

VBAT