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SC1205HSTR bảng dữ liệu(PDF) 6 Page - Semtech Corporation |
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SC1205HSTR bảng dữ liệu(HTML) 6 Page - Semtech Corporation |
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6 / 13 page ![]() 6 2002 Semtech Corp. www.semtech.com POWER MANAGEMENT SC1205H PRELIMINARY Block Diagram Applications Information Theory of Operation SC1205His the higher gate drive voltage version of it predecessor, the SC1205. It is designed for optimum enhancement of Low Rds_On power MOS.ETs with ul- tra-low rise/fall times and propagation delays. Higher MOS.ET enhancement has been made possible by opti- mally increasing the gate drive voltage while maintaining low switching losses at minimum RDS_ON. The SC1205H is designed for a gate drive voltage of 8V, without com- promising features that allow fast switching and low propa- gation delays. .ast Switching Drives As the switching frequency of PWM controllers is increased to reduce power supply volume and cost, fast rise and fall times are necessary to minimize switching losses (TOP MOS.ET) and reduce dead-time (BOTTOM MOS.ET) losses. While low Rds_On MOS.ETs present a power saving in I2R losses, the MOS.ETs die area is larger and the effective input capacitance of the MOS.ET is in- creased. Often a 50% decrease in Rds_On doubles the effective input gate charge, which must be supplied by the driver. The Rds_On power savings can be offset by the switching and dead-time losses with a suboptimum driver. While discrete solution can achieve reasonable drive capability, implementing shoot-through, program- mable delay and other housekeeping functions neces- sary for safe operation can become cumbersome and costly. The SC1205H presents a total solution for the high-speed, high power density applications. Wide input supply range of 4.5V-18V allows use in battery powered applications, new high voltage, distributed power serv- ers. Shoot Through Protection The control input (CO) to the SC1205H is typically sup- plied by a PWM controller that regulates the power sup- ply output. (See Application Evaluation Schematic, .ig- ure 6). The timing diagram demonstrates the sequence of events by which the top and bottom drive signals are applied. The shoot-through protection is implemented by holding the bottom .ET off until the voltage at the phase node (intersection of top .ET source, the output inductor and the bottom .ET drain) has dropped below 1V. This assures that the top .ET has turned off and that a direct current path does not exist between the input supply and ground, a shoot-through condition dur- ing which both the top and bottom .ETs could be on momentarily. The top .ET is also prevented from turn- ing on until the bottom .ET is off. This time is internally set to 20ns (typical). The EN (enable) pin may be used to turn both TG and BG drives off. This would allow lower power operation by reducing the quiescent current draw of the SC1205H to less than 10µA. |
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