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PPC405EP-3LB133C bảng dữ liệu(PDF) 37 Page - Applied Micro Circuits Corporation

tên linh kiện PPC405EP-3LB133C
Giải thích chi tiết về linh kiện  PowerPC 405EP Embedded Processor
PDF  50 Pages
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nhà sản xuất  AMCC [Applied Micro Circuits Corporation]
Trang chủ  http://www.amcc.com
Logo AMCC - Applied Micro Circuits Corporation

PPC405EP-3LB133C bảng dữ liệu(HTML) 37 Page - Applied Micro Circuits Corporation

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PPC405EP – PowerPC 405EP Embedded Processor
Revision 1.07 – September 10, 2007
AMCC
37
Data Sheet
c. TCMax = TJMax – P×θJC, where TJMax is maximum junction temperature and P is power consumption.
Table 9. Recommended DC Operating Conditions (Sheet 1 of 2)
Device operation beyond the conditions specified is not recommended. Extended operation beyond the recommended
conditions can affect device reliability.
Notes:
1. PCI drivers meet PCI specifications.
2. See “5V-Tolerant Input Current” on page 38.
Parameter
Symbol
Minimum
Typical
Maximum
Unit
Notes
Logic Supply Voltage (133, 200, 266MHz)
VDD
+1.65
+1.8
+1.95
V
Logic Supply Voltage (333MHz)
VDD
+1.7
+1.8
+1.9
V
I/O Supply Voltage
OVDD
+3.0
+3.3
+3.6
V
PLL Supply Voltage (133, 200, 266MHz)
AVDD
+1.65
+1.8
+1.95
V
PLL Supply Voltage (333MHz)
AVDD
+1.7
+1.8
+1.9
V
Input Logic High
(1.8V CMOS receivers)
VIH
0.65VDD
VDD
V
Input Logic High
(3.3V PCI receivers)
VIH
0.5OVDD
OVDD+0.5
V
Input Logic High
(3.3V LVTTL, 5V tolerant receivers)
VIH
+2.0
+5.5
V
Input Logic Low
(1.8V CMOS receivers)
VIL
0
0.65VDD
V
Input Logic Low
(3.3V PCI receivers)
VIL
-0.5
0.35OVDD
V
Input Logic Low
(3.3V LVTTL, 5V tolerant receivers)
VIL
0+0.8
V
Output Logic High
(3.3V PCI receivers)
VOH
0.9OVDD
OVDD
V
Output Logic High
(3.3V LVTTL, 5V tolerant receivers)
VOH
+2.4
OVDD
V
Output Logic Low
(3.3V PCI receivers)
VOL
-0.5
0.35OVDD
V
Output Logic Low
(3.3V LVTTL, 5V tolerant receivers)
VOL
0+0.4
V
Input Leakage Current
(no pull-up or pull-down)
IIL1
00
μA
Input Leakage Current
(with internal pull-down)
IIL2
0200
μA
5V Tolerant I/O Input Current
IIL4
±10
-325
μA
2
Input Max Allowable Overshoot
(1.8V CMOS receivers)
VIMAO1.8
VDD + 0.6
V
Input Max Allowable Overshoot
(3.3V LVTTL, 5V tolerant receivers)
VIMAO
+5.5
V
Input Max Allowable Undershoot
(3.3V LVTTL, 5V tolerant receivers)
VIMAU
-0.6
V
Output Max Allowable Overshoot
(3.3V LVTTL, 5V tolerant receivers)
VOMAO
+5.5
V
Output Max Allowable Undershoot
(3.3V LVTTL, 5V tolerant receivers)
VOMAU
-0.6
V



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