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MB90583C bảng dữ liệu(PDF) 21 Page - fujitsu semiconductor |
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MB90583C bảng dữ liệu(HTML) 21 Page - fujitsu semiconductor |
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21 / 110 page ![]() MB90580C Series 21 13. Indeterminate outputs from ports 0 and 1 The outputs from ports 0 and 1 become indeterminate during a power-on reset after the power is turned on. Pay attention to the port output timing shown as follow. 14. Initialization In the device, there are internal registers which are initialized only by a power-on reset. To initialize these registers turning on the power again. 15. Return from standby state If the power-supply voltage goes below the standby RAM holding voltage in the standby state, the device may fail to return from the standby state. In this case, reset the device via the external reset pin to return to the normal state. 16. Precautions for Use of ’DIV A, Ri,’ and ’DIVW A, RWi’ Instructions The signed multiplication-division instructions ’DIV A, Ri,’ and ’DIVW A, RWi’ should be used when the corre- sponding bank registers (DTB, ADB, USB, SSB) are set to value ’00h.’ If the corresponding bank registers (DTB, ADB, USB, SSB) are set to a value other than ’00h,’ then the remainder obtained after the execution of the instruction will not be placed in the instruction operand register. 17. Precautions for Use of REALOS Extended intelligent I/O service (EI2OS) cannot be used, when REALOS is used. VCC (Power-supply pin) PONR (power-on reset) signal RST (external asynchronous reset) signal RST (internal reset) signal Oscillation clock signal KA (internal operation clock A) signal KB (internal operation clock B) signal PORT (port output) signal Period of indeterminate Power-on reset*1 Oscillation settling time*2 *1: Power-on reset time: Period of “clock frequency x 217” (Clock frequency of 16 MHz: 8.192 ms) *2: Oscillation settling time: Period of “clock frequency x 218” (Clock frequency of 16 MHz: 16.384 ms) |
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