Data Sheet

ADAQ4381-4

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

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Rev. 0 | 13 of 45

Table 7. Pin Function Descriptions (Continued)

Pin Number

Mnemonic

Type1

Description

C9

SDOC

DO

Serial Data Output C. This pin functions as a serial data output pin to access the conversion results and register

contents.

D1

INC2+

AI

Channel C Positive Input to 2.70 kΩ Gain Resistor Network.

D2

SJC+

AI

ADC Driver Positive Input Summing Node for Channel C.

D6, D7

OUT_LDO

P

Integrated LDO Output Voltage. The voltage at this pin is 3.45 V typical.

D9

SCLK

DI

Serial Clock Input. This serial clock input is for data transfers to and from the ADC.

E2

PD_FDA

P

Active low. Connect this pin to GND to power down (disable) the ADC Drivers. Connect VS+ for normal operation.

E3

MODE_FDA

P

Power Mode for ADC Drivers. Connect to VS+ for full power mode. Connect to GND to enter low power mode.

E6, F5, F6, G7

DNC

N/A3

Do Not Connect. Leave these pins floating/unconnected.

E7

VCC

P

ADC Analog Supply Voltage. This pin is decoupled to ground internally. Additional decoupling capacitors may not be

necessary.

E9

SDI

DI

Serial Data Input. This input provides the data written to the on-chip control registers.

F1

INB2+

AI

Channel B Positive Input to 2.70 kΩ Gain Resistor Network.

F2

SJB+

AI

ADC Driver Positive Input Summing Node for Channel B.

F3, F4, G3, G4

VS−

P

Amplifiers Negative Supply. These pins are decoupled to ground internally. Additional decoupling capacitors may not

be necessary.

F7

REFIN

P

Internal Reference Supply Voltage. Connect to VS+ for normal operation. This pin is decoupled to ground internally.

Additional decoupling capacitors may not be necessary.

F9

SDOB

DO

Serial Data Output B. This pin functions as a serial data output pin to access the conversion results and register

contents.

G1

INB2−

AI

Channel B Negative Input to 2.70 kΩ Gain Resistor Network.

G2

SJB−

AI

ADC Driver Negative Input Summing Node for Channel B.

G6

REFSENSE

AO2

Reference Output Sense pin.

For accurate gain calibration, use this pin to measure the actual level of the internal 3.3 V reference. If not utilized,

leave this pin floating and unconnected.

Capacitive load connected to this pin must not exceed 1 μF to ensure system stability.

G9

SDOA

DO

Serial Data Output A. This pin functions as a serial data output pin to access the conversion results and register

contents.

H2

OUTB−

AO2

ADC Driver Negative Output for Channel B.

H3

OUTB+

AO2

ADC Driver Positive Output for Channel B.

H4

SJA+

AI

ADC Driver Positive Input Summing Node for Channel A.

H5

SJA−

AI

ADC Driver Negative Input Summing Node for Channel A.

H6

OUTA−

AO2

ADC Driver Negative Output for Channel A.

H7

OUTA+

AO2

ADC Driver Positive Output for Channel A.

H9

CS

DI

Chip Select Input. Active low, logic input. This input provides the dual function of initiating conversions on the

ADAQ4381-4 and framing the serial data transfer.

J2

INB1+

AI

Channel B Positive Input to 1.62 kΩ Gain Resistor Network.

J3

INB1−

AI

Channel B Negative Input to 1.62 kΩ Gain Resistor Network.

J4

INA2+

AI

Channel A Positive Input to 2.70 kΩ Gain Resistor Network.

J5

INA2−

AI

Channel A Negative Input to 2.70 kΩ Gain Resistor Network.

J6

INA1+

AI

Channel A Positive Input to 1.62 kΩ Gain Resistor Network.

J7

INA1−

AI

Channel A Negative Input to 1.62 kΩ Gain Resistor Network.

1 AI is analog input, AO is analog output, P is power, DI is digital input, and DO is digital output.

2 Analog output pins are for voltage monitoring/measurement, and setting the gain of ADAQ4381-4 only. These pins must not be driven externally.

3 N/A means not applicable.