PI6C48535-11LE datasheet(2/5 Pages) PERICOM

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PI6C48535-11

3.3V Low Skew 1-to-4

Crystal/LVCMOS to LVPECL Fanout Buffer

PS9738

05/27/04

Pin Description

Name

Pin #

Type

Description

VEE

Connect to Negative power supply

CLK_EN

I_PU

Synchronizing clock enable. When high, clock outputs follow clock input. When low, Qx

outputs are forced low, nQx outputs are forced high. LVCMOS/LVTTL level with 50KΩ

pull up.

CLK_SEL

I_PD

Clock select input. When high, selects CLK1 input. When low, selects CLK0 input.

LVCMOS/LVTTL level with 50KΩ pull down.

CLK

I_PD

LVCMOS / LVTTL clock input

Xtal1,

Xtal2

6, 7

Crystal input and output

5, 8, 9

No internal connection.

VCC

10, 13,

Connect to 3.3V

Q3, nQ3

11, 12

Differential output pair, LVPECL interface level.

Q2, nQ2

14, 15

Differential output pair, LVPECL interface level.

Q1, nQ1

16, 17

Differential output pair, LVPECL interface level.

Q0, nQ0

19, 20

Differential output pair, LVPECL interface level.

Notes:

1. I = Input, O = Output, P = Power supply connection, I_PD = Input with pull down, I_PU = Input with pull up

Pin Characteristics

Symbol

Parameter

Conditions

Min.

Typ.

Max.

Units

CIN

Input Capacitance

R_pullup

Input Pullup Resistance

KΩ

R_pulldown

Input Pulldown Resistance

KΩ

Control Input Function Table

Inputs

Outputs

CLK_EN

CLK_SEL

Selected Source

Q0:Q3

nQ0:nQ3

CLK

Diasbled: Low

Diasbled: High

Xtal1, Xtal2

Disabled: Low

Disabled: High

CLK

Enabled

Xtal1, Xtal2

Enabled

Notes:

1. After CLK_EN switches, the clock outputs are disabled or enabled following a rising and falling input clock edge as show below.

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